DTH7500 / DTH8000
First issue 12 / 03
*
DXXVCC
*
DGND
CIRCUIT DIAGRAM
LAB3
21285810-00-3
DXX_VCLKO
*
(PREP)
16.0V
27PF
CD579
B_BCLK
B_DATA
VID_CLK
(PREP)
DAMCLK
DGND
*
*
VID_CLK
RXD2
DGND
DGND
VID_ACTIVE
VID_ACTIVE
DGND
+3V3SD
DGND
DGND
DXX_FLD
DXX_GEM_SW
DXX_MOV_SW/PS_V
DGND
*
*
*
DGND
SPDIF_DXX
DALRCLK
DASCLK
DASDAT2
DASDAT1
DASDAT0
80
BB101D
79
BB101D
78
BB101D
VID_CLK
MODEM_IRQ
RING
RTS
RLSD
MODEM_RST
DSR
CTS
AFT2/AVLINK_W
AFT1/AVLINK_R
+3.3VCPU
MODEM_IRQ
DGND
RESET
ADSDAT2
ADLRCLK
ADSCLK
DGND
DASDAT1
DASDAT3
DAMCLK
I2C_CLK
4
3
2
1
5
6
7
8
4
3
2
1
5
6
7
8
33R0
ND501
VID_DET
DAC_MUTE1
BBI2C_DATA1
DXX_GEM_SW
SYS_CS
FAN_ON
*
1U0
CD534
SYS_RST
DGND
+3.3VCPU
RTS
RD541
0R0
CE3
CE2
68R0
RD533
10R0
RD516
100R0
RD540
100R0
RD539
100R0
RD538
RD508
100R0
RD506
100R0
10K0
RD510
10K0
RD530
RD509
10K0
10K0
RD511
20P0
CD562
20P0
CD563
1N0
CD515
CD522
1N0
1N0
CD523
1N0
CD546
1N0
CD547
1N0
CD517
CD516
1N0
1N0
CD549
1N0
CD552
1N0
CD524
1N0
CD551
16
CD535
100N0
CD532
100N0
100P0
CD544
100P0
CD545
47U0
CD504
47U0
CD502
47U0
CD505
DAC_MUTE1
OE
+3.3VCPU
+3.3VCPU
WE1
AV_CS0
AV_RAS
AV_CAS
AV_WE
AV_QDML
AV_QDMU
+3V3SD
+5VS3D
DGND
DGND
DGND
DXXVCC
+3.3VCPU
DXXVCC
CV_OUT
DXXVCC
Y_OUT
C_OUT
AV_MA0
AV_MA1
AV_MA2
AV_MA3
AV_MA4
AV_MA5
AV_MA6
AV_MA7
AV_MA8
AV_MA9
AV_MA10
AV_MA11
AV_MA12
AV_MA13
AV_MA[0:13]
TCK
TDI
TDO
TMS
DGND
TRIG_IN
TRIG_OUT
DGND
DGND
DGND
DGND
R_OUT
B_OUT
SYS_RST
DGND
TMS
TDI
TRESET
TRESET
TRIG_IN
TRIG_OUT
G_OUT
PPC_CLK
DGND
DGND
DGND
DGND
AGND
AGND
B_FLAG
AV_MD15
AV_MD14
AV_MD13
AV_MD12
AV_MD11
AV_MD10
AV_MD9
AV_MD8
AV_MD7
AV_MD6
AV_MD5
AV_MD4
AV_MD3
AV_MD2
AV_MD1
AV_MD0
AV_MD[0:15]
GS_IRQ0
RING
GS_IRQ1
GS_IRQ2
MEMWAIT
AGND
DGND
+3.3VCPU
WE0
RNOTW
EMI_AD11
EMI_AD1
EMI_AD2
EMI_AD3
EMI_AD4
EMI_AD5
EMI_AD6
EMI_AD7
EMI_AD8
EMI_AD9
EMI_AD10
EMI_AD12
EMI_AD13
EMI_AD14
EMI_AD15
EMI_AD16
EMI_AD17
EMI_AD18
EMI_AD19
EMI_AD20
EMI_AD21
EMI_AD[1:21]
CD500
47U0
1N0
CD554
CD555
1N0
+3V3SD
DGND
80R0
FD501
+3.3VCPU
+3.3VCPU
CD567
10U0
16.0V
CD564
10U0
16.0V
EN_ST9
DGND
1N0
CD550
68P0
CD566
*
10R0
RD515
1
ED501
RD544
0R0
0R0
RD547
TPD51
4
3
2
1
5
6
7
8
8
7
6
5
1
2
3
4
33R0
ND503
4
3
2
1
5
6
7
8
4
3
2
1
5
6
7
8
ND504
33R0
4
3
2
1
5
6
7
8
8
7
6
5
1
2
3
4
ND505
33R0
4
3
2
1
5
6
7
8
4
3
2
1
5
6
7
8
33R0
ND502
4
3
2
1
5
6
7
8
8
7
6
5
1
2
3
4
ND506
33R0
4
3
2
1
5
6
7
8
4
3
2
1
5
6
7
8
33R0
ND507
4
3
2
1
5
6
7
8
8
7
6
5
1
2
3
4
ND508
33R0
4
3
2
1
5
6
7
8
4
3
2
1
5
6
7
8
33R0
ND509
4
3
2
1
5
6
7
8
8
7
6
5
1
2
3
4
ND511
68R0
4
3
2
1
5
6
7
8
4
3
2
1
5
6
7
8
ND518
10K0
4
3
2
1
5
6
7
8
4
3
2
1
5
6
7
8
68R0
ND513
4
3
2
1
5
6
7
88
7
6
5
1
2
3
4
10K0
ND517
RAS0
CE1
4
3
2
1
5
6
7
8
4
3
2
1
5
6
7
8
10K0
ND500
4
3
2
1
5
6
7
8
8
7
6
5
1
2
3
4
ND512
68R0
TPD55
TPD56
TPD57
TPD58
TPD59
TPD60
TPD61
1
ED513
1
ED512
TPD66
31R0
FD504
80R0
FD502
CTS
+5VS3D
+3V3SD
+2V5SD
AV_MA[0:13]
AV_MD[0:15]
EMI_D[0:15]
GS_IRQ0
GS_IRQ1
GS_IRQ2
MEMWAIT
AV_CS0
AV_RAS
AV_CAS
AV_WE
AV_QDML
AV_QDMU
AV_SDCLK
RAS0
CE1
CE3
CE2
CAS0
SYS_CS
OE
PPC_CLK
Y_OUT
C_OUT
CV_OUT
R_OUT
G_OUT
B_DATA
B_BCLK
B_FLAG
B_SYNC
27CK_DXX
RESET
FLASH_WR
DX_656D[0:7]
DXXHSYNC
DXX_FLD
B_OUT
DASDAT3
BBI2C_DATA1
BBI2C_CLK1
DGND
+2V5SD
+1V8SD
0R0
RD552
0R0
RD553
+5VS3D
+1V8SD
AV_SDCLK
EMI_AD[1:21]
JTAG
RNOTW
WE0
EMI_D3
EMI_D1
EMI_D[0:15]
EMI_D0
EMI_D2
EMI_D4
EMI_D5
EMI_D6
EMI_D7
EMI_D8
EMI_D9
EMI_D10
EMI_D11
EMI_D12
EMI_D13
EMI_D14
EMI_D15
1
2
3
4
5
6
7
8
9
10
10
9
8
7
6
5
4
3
2
1
21152800
BD501
TPD62
TPD63
1U0
CD503
G
D
S
TD500
PMBF170N
G
D
S
PMBF170N
TD501
RD542
0R0
DXXVCC
+3.3VCPU
RD560
0R0
AGND
E2PROM_EN
0R0
RD559
B_SYNC
*
AGND
E2PROM_EN
RD567
0R0
RD556
10R0
CAS0
RD536
68R0
RD568
68R0
1N0
CD553
DGND
I2C_DATA
I2C_CLK
WE1
BBI2C_CLK1
RLSD
DTR
DGND
DSR
TXD1
I2S_SEL
SLIDE_OUT
SLIDE_IN
SLIDE_OC
HW_SW
DX_656D[0:7]
DX_656D1
DX_656D3
DX_656D4
DX_656D6
DX_656D2
DX_656D5
DX_656D0
DX_656D7
TPD68
RD554
10K0
10K0
RD555
*
TPD71
4
3
2
1
5
6
7
8
8
7
6
5
1
2
3
4
33R0
ND510
SLIDE_IN
SLIDE_OUT
SLIDE_OC
I2C_CLK
I2C_DATA
I2C_DATA
DALRCLK
DASCLK
DALRCLK
DASCLK
DASDAT0
AFT2/AVLINK_W
VID_DET
TPD80
+3V3SD
+2V5SD
MODEM_RST
I2S_SEL
RD507
100R0
EN_ST9
SPDIF_DXX
RD566
4K7
ADSCLK
ADLRCLK
DGND
HW_SW
AFT1/AVLINK_R
*
1
2
3
4
5
6
7
8
9
10
11
12
13
14
14
13
12
11
10
9
8
7
6
5
4
3
2
1
BB103D
21179200
DGND
RD502
2K7
RD503
2K7
2K7
RD500
2K7
RD501
ADSDAT2
TPD81
*
*
+3.3VCPU
DGND
TPD52
TPD90
TPD70
TPD83
TPD86
TPD87
TPD92
DASDAT2
BBI2C_CLK1
BBI2C_DATA1
TPD72
TPD01
TPD02
DTR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1
2
3
4
5
6
7
8
9
10
11
12
13
14
BB902D
21179200
DX_656D[0:7]
DX_656D0
DX_656D2
DX_656D3
DX_656D4
DX_656D5
DX_656D7
DX_656D1
DX_656D6
3
BB101D
2
BB101D
4
BB101D
6
BB101D
39
BB101D
38
BB101D
37
BB101D
34
BB101D
36
BB101D
35
BB101D
33
BB101D
47
BB101D
48
BB101D
51
BB101D
52
BB101D
7
BB101D
30
BB101D
53
BB101D
54
BB101D
50
BB101D
55
BB101D
29
BB101D
8
BB101D
32
BB101D
45
BB101D
RD532
1K0
FAN_ON
BBI2C_CLK1
TPD89
TPD88
TPD69
TPD82
TPD39
TPD64
TPD65
TPD67
TPD76
TPD77
TPD78
TDO
TCK
CD501
100P0
68R0
RD558
CD568
100P0
47U0
CD530
TPD04
TPD79
TPD84
DXX_MOV_SW
PS_V
0R0
RD563
0R0
RD564
PS_RST
PS_V
DGND
JTEST
1
2
3
4
1
2
3
4
BD502
*
*
30P0
CD569
CD570
30P0
30P0
CD571
CD572
30P0
30P0
CD573
CD574
30P0
30P0
CD576
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
25520240
BB104D
TPD91
DX_656D0
DX_656D1
DX_656D2
DX_656D3
DX_656D4
DX_656D5
DX_656D6
DX_656D7
DX_656D5
DX_656D4
DX_656D3
DX_656D2
DX_656D1
DX_656D0
DX_656D[0:7]
DX_656D6
DX_656D7
RD522
2K2
RD512
2K2
BBI2C_DATA1
TPD03
DXXHSYNC
TPD97
TPD98
TPD95
TPD100
RXD1
TPD102
TPD05
TXD1
TPD96
TPD06
TPD07
TPD08
TPD09
TPD10
TPD20
TPD21
TPD22
TPD23
TPD103
TPD24
TPD25
TPD26
TPD27
TPD28
TPD29
TPD36
TPD37
DXX_MOV_SW
TPD38
TPD101
10UH
FD503
RXD1
DD500
1N4148W
21030100
DASDAT3
TXD2
1K0
RD531
TPD53
BZT55C6V8
DD501
TPD54
BZT55C6V
8
DD502
2U2H
FD500
RD561
0R0
*
VID_CLK/PS_RST
TPD94
VID_CLK1
FLASH_WR
0R0
RD565
DAMCLK
VID_CLK
VID_CLK2
0R0
RD570
0R0
RD569
CD575
30P0
CD578
18P
DGND
100R0
RD505
RD518
10K0
*
RD517
10K0
TPD93
PS_RST
4
VDD3_0
VDD3_1
47
VDD3_2
81
VDD3_3
107
VDD3_4
136
VDD3_5
159
VDD3_6
184
14
VDD2_0
VDD2_1
37
VDD2_2
64
VDD2_3
94
VDD2_4
119
VDD2_5
149
VDD2_6
171
VDD2_7
198
122
VDD_PLL
VSS_0
5
15
VSS_1
38
VSS_2
50
VSS_3
65
VSS_4
83
VSS_5
96
VSS_6
108
VSS_7
121
VSS_8
137
VSS_9
150
VSS_10
160
VSS_11
172
VSS_12
185
VSS_13
199
VSS_14
VSS_PLL
123
49
VSS_PCM
114
PWM2
115
PWM1
116
PWM0
PIO5_5
105
PIO5_4
104
PIO5_3
103
PIO5_2
22
PIO4_7
46
PIO4_6
45
PIO4_5
44
PIO4_4
43
PIO4_3
42
PIO4_2
41
PIO4_1
40
39
PIO4_0
PIO3_7
13
PIO3_6
12
PIO3_5
11
PIO3_4
10
PIO3_3
9
PIO3_2
8
PIO3_1
7
6
PIO3_0
PIO2_7
3
PIO2_6
2
PIO2_5
1
PIO2_4
208
PIO2_3
207
PIO2_2
206
PIO2_1
205
204
PIO2_0
TRIGGER_OUT
203
TRIGGER_IN
202
PIO1_5
201
PIO1_4
200
PIO1_3
197
PIO1_2
196
PIO1_1
195
194
PIO1_0
PIO0_7
193
PIO0_6
192
PIO0_5
191
PIO0_4
190
PIO0_3
189
PIO0_2
188
PIO0_1
187
186
PIO0_0
124
RESET_
STI5589
PROC_POWER_IO
ID500
16
B_DATA
B_BCLK
17
18
B_FLAG/F_PCLK
B_SYNC/F_ERR
19
B_WCLK
20
21
B_V4
48
VDD_PCM1
VSS_PCM
49
V_REF_YCC
35
36
I_REF_YCC
VDD_RGB
23
24
VSS_RGB
28
V_REF_RGB
I_REF_RGB
29
30
VDD_YCC
VSS_YCC
31
120
PIX_CLK
106
AUX_CLK
25
B_OUT
G_OUT
26
27
R_OUT
CV_OUT
34
33
C_OUT
Y_OUT
32
57
SPDIF_OUT
DAC_PCMCLK
55
DAC_LRCLK
56
51
DAC_SCLK
DAC_PCMOUT2
54
53
DAC_PCMOUT1
DAC_PCMOUT0
52
STI5589
PROC_LINK_AV
ID500
84
SMI_D0
SMI_D1
85
SMI_D2
86
SMI_D3
87
SMI_D4
88
SMI_D5
89
SMI_D6
90
SMI_D7
91
SMI_D8
92
SMI_D9
93
SMI_D10
97
SMI_D11
98
SMI_D12
99
SMI_D13
100
SMI_D14
101
SMI_D15
102
69
SMI_A0
SMI_A1
68
SMI_A2
67
SMI_A3
66
SMI_A4
58
SMI_A5
59
SMI_A6
60
SMI_A7
61
SMI_A8
62
SMI_A9
63
SMI_A10
70
SMI_A11
71
SMI_A12
72
SMI_A13
73
SMI_CS1_
75
74
SMI_CS0_
SMI_RAS_
76
77
SMI_CAS_
SMI_WE_
78
79
SMI_DQML
SMI_DQMU
80
SMI_CLKOUT
95
82
SMI_CLKIN
141
CPU_D0
CPU_D1
142
CPU_D2
143
CPU_D3
144
CPU_D4
145
CPU_D5
146
CPU_D6
147
CPU_D7
148
CPU_D8
151
CPU_D9
152
CPU_D10
153
CPU_D11
154
CPU_D12
155
CPU_D13
156
CPU_D14
157
CPU_D15
158
127
IRQ0
IRQ1
126
IRQ2
125
CPU_WAIT
131
TCK
113
112
TDI
111
TDO
110
TMS
TRST
109
CPU_PROCLK
118
140
CPU_CAS1
CPU_CAS0
139
138
CPU_RAS
CPU_BE1
129
128
CPU_BE0
CPU_OE
117
130
CPU_RW
132
CPU_CE3
CPU_CE2
133
134
CPU_CE1
CPU_CE0
135
183
CPU_A21
182
CPU_A20
181
CPU_A19
180
CPU_A18
179
CPU_A17
178
CPU_A16
177
CPU_A15
176
CPU_A14
175
CPU_A13
174
CPU_A12
173
CPU_A11
170
CPU_A10
169
CPU_A9
168
CPU_A8
167
CPU_A7
166
CPU_A6
165
CPU_A5
164
CPU_A4
163
CPU_A3
162
CPU_A2
CPU_A1
161
STI5589
PROC_MEMORY
ID500
16.0V
100N0
CD529
DGND
16.0V
27PF
CD580
10R0
RD557
18P
CD577
27CK_DXX
10K0
RD504
RD543
0R0
RD571
0R0
0R0
RD572
DGND
18P
CD581
DXX_VCLKO
MPEG DECODER
RD529
47R0
RD528
220R0
RD562
0R0
*
RD573
0R0
47R0
RD521
140103
(DIGITAL BOARD 6/9)
MAIN SCHEMATIC DIAGRAM - SCHEMA DE LA PLATINE PRINCIPALE - SCHALTBILD HAUPTPLATINE - SCHEMA DELLA PIASTRA PRINCIPALE- ESQUEMA DE LA PLATINA PRINCIPAL
