8
4.
SYSTEM CONFIGURATION
4-1. Principle of Operation
Digital signals through the GP-IB connector are supplied to the
GP-IB interface IC through the bus transceiver.
The handshaking timing of this GP-IB interface conforms to the
IEEE-488-1978. Codes received by the GP-IB interface are
decoded by the CPU then. The CPU converts the data into
binary data and outputs to the D/A converters through serial
output ports. Those data pass through photo-isolators and are
isolated. The shift registers convert them into parallel data,
which are input to the D/A converters. The CPU also executes
controls of the control connectors and SRQ processing.
The block diagram of the GP-600B is as shown below.
Block diagram
Port
Photo-isolator
Shift register
D/A
POWER
CONT 2
Photo-isolator
Shift register
D/A
OUT A
Photo-isolator
Shift register
D/A
OUT B
Photo-isolator
Shift register
D/A
OUT C
POWER
CONT 1
OUTPUT
CONT 2
OUTOUT
CONT 1
OUT D
CPU
ROM
RAM
GP-IB connector
GP-IB bus transceiver
GP-IB interface IC
