The device then turns on and operates in open loop mode as shown in
shows the output of TPS7H5001-SP measured on J1–J4 with the quick start method.
Figure 2-2. TPS7H5001/2/3/4-SP Output
The operation of this mode is such that forcing the voltage on COMP creates an output on the
TPS7H5001/2/3/4EVM-CVAL. The duty cycle varies based on the input voltage on COMP as well as the triangle
waveform created by the CS_LIM circuit or any other waveform that the user decides to add to the CS_LIM
pin. See
for signal generation waveforms. Note that OUTB and SRB is not present for
TPS7H5002EVM-CVAL and TPS7H5003EVM-CVAL. SRA and SRB are not present for TPS7H5004EVM-CVAL.
shows waveforms for input and output signal generations for the TPS7H5001/2/3/4EVM-
CVAL based on COMP voltage and CS_LIM pin voltage.
EVM Setup and Quick Start Guide
SLVUCD0 – FEBRUARY 2022
TPS7H500x-SP Evaluation Module User's Guide
5
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