SPI
ENABLE
CONFIG
I2C
AVS-I2C
DCDC OUTPUT
LOAD SWITCH
VDCDC1
VDCDC2
VDCDC3
VDCDC4
LSI
LSO
LDO SUPPLY
VINLDO1210
VINLDO3
VINLDO4
VINLDO5
VINLDO67
VINLDO8
VINLDO9
LDO OUTPUT
VLDO1
VLDO2
VLDO3
VLDO4
VLDO5
VLDO6
VLDO7
VLDO8
VLDO9
VLDO10
SUPPLY INPUT
CLK_REQ1
CLK_REQ2
PWR_REQ
3V to 5V
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
S+
S-
S+
S+
S+
S-
VREF1V25
GND
VDDIO
GND
SLEEP
GND
INT1
GND
NRESPWRON
GND
SCL_AVS
GND
SDA_AVS
GND
VCON_CLK
GND
VCON_PWM
GND
CPCAP_WDI
LDOAO
OMAP_WDI
VDDIO
EN_LS1
GND
VDDIO
EN_LS0
GND
VDDIO
EN4
GND
VDDIO
EN3
GND
VDDIO
EN2
GND
VDDIO
EN1
GND
LDOA0
CONFIG1
GND
LDOA0
CONFIG2
GND
LDOA0
DEF_SPI_I2C
GND
LSI
VCCS_VIN_MON
VBAT
VCCS_VIN_MON
GND
LDOA0
PWRON
VDDIO
(JP12)
PWRHOLD
GND
PWRON
GND
Components with no values are not installed.
1
VDDIO
VBAT
GND
PWRHOLD
JP8
JP9
JP1
JP2
JP3
JP4
JP5
1
2
J28
1
2
3
4
J29
JP6
JP7
1
2
J30
1
2
J31
1
2
J35
1
2
J36
1
2
3
4
5
6
7
8
9
10
J37
1
2
3
4
5
6
7
8
9
10
J38
1
2
3
4
5
6
J39
1
2
3
4
J32
R30
3.30k
R31
3.30k
R32
3.30k
R33
3.30k
1
2
J34
1
2
3
4
5
6
J3
C32 10uF
R26
0
R27
0
1
2
3
4
5
6
J4
C33 10uF
R28
0
1
2
3
4
5
6
J5
C34 10uF
R29
0
1
2
3
4
5
6
J6
C35 10uF
R34
0
R35
0
1
2
3
4
J26
1
2
3
4
J27
1
2
J9
1
2
J10
1
2
J11
1
2
J12
C36
2.2uF
C37
2.2uF
C38
2.2uF
C39
2.2uF
R36
R37
0
R38
R39
R40
R41
0
R42
R43
0
R44
R45
0
1
2
J13
C40
2.2uF
R46
R47
0
1
2
J14
C41
2.2uF
R48
R49
0
1
2
J15
C42
2.2uF
R50
R51
0
1
2
J16
C43 2.2uF
1
2
J17
C44 2.2uF
1
2
J18
C45 2.2uF
1
2
J19
C46 2.2uF
1
2
J20
C47 2.2uF
1
2
J21
C48 2.2uF
1
2
J22
C49 2.2uF
1
2
J23
C50 2.2uF
1
2
J24
C51 2.2uF
1
2
J25
C52 2.2uF
1
2
3
4
5
6
J7
C54 10uF
R53
0
R54
R56
R57
R58
0
JP11
S1
R18
10.0k
1
2
J33
C55
4.7uF
R23
3.30k
1
2
J41
1
2
J42
R60
R61
C56
22uF
R4
0
JP10
R25
R52
R55
R59
R62
JP12
LDOAO
LDOAO
LDOAO
CONFIG1
CONFIG2
DEF_SPI_I2C
EN1_DCDC1
EN2_DCDC2
EN3_DCDC3
EN4_DCDC4
CPCAP_WDI
NRESPWRON
LDOAO
EN_LS0
EN_LS1
VREF1V25
VDDIO
SLEEP
INT1
SDA_MOSI
SCL_CLK
SDA_AVS
GPIO2_CE
SDA_MOSI
SCL_CLK
GPIO1_MISO
VDDIO
OMAP_WDI
VDDIO
VCON_CLK
VCON_PWM
VDDIO
VDDIO
SCL_AVS
VCCS_VIN_MON
VBAT
LSI
VDCDC1
VDCDC1_SENSE
VDCDC1_GND_SENSE
VDCDC2
VDCDC2_SENSE
VDCDC3
VDCDC3_SENSE
VDCDC4
VDCDC4_SENSE
VDCDC4_GND_SENSE
LSI
LSO
VINLDO1210
VINLDO3
VINLDO4
VINLDO5
VDCDC3
VBAT
VDCDC2
VDCDC3
VDCDC2
VBAT
VDCDC2
VBAT
VDCDC3
VBAT
VINLDO67
VDCDC3
VBAT
VINLDO8
VDCDC3
VBAT
VINLDO9
VDCDC3
VBAT
VLDO1
VLDO2
VLDO3
VLDO4
VLDO5
VLDO6
VLDO7
VLDO8
VLDO9
VLDO10
VBAT
LSI
VBAT
LSI
LSO
VBAT
VDCDC2
LDOAO
VDDIO
PWRHOLD
PWRON
SCL_AVS
SDA_AVS
VDDIO
VDDIO
VDDIO
VCC
VDCDC2
VDCDC2
VDCDC2
VDCDC2
VDCDC3
Schematic Diagram
Figure 2. TPS65912xEVM-081 Schematic Page 2/2
5
SLVU750A – July 2012 – Revised May 2013
TPS65912xEVM-081
Copyright © 2012–2013, Texas Instruments Incorporated