Evaluation With the TPS6110x EVM
2-3
Setup of the EVMs
2.1.5
LBI/LBO Comparator
The LBO1 and LBO2 terminals are open drain outputs and have pullup
resistors, R7 and R8, connected to the output. The signal on these pins can
go low as soon as the input voltage at LBI falls below the threshold of 500 mV.
Refer to the more detailed description and the truth table in the datasheet. Both
LBO outputs stay at high-impedance when the input voltage at LBI is above
the appropriate thresholds. A resistor divider (R1, R2) is used on the EVM to
monitor the supply voltage.
More details about setting the low battery threshold voltage can be found in
the data sheet (literature number SLVS411).
2.1.6
Power Good Output
The PG pin is an open drain output with a pullup resistor, R9, connected to the
output. The signal on this pin goes high as soon as the output voltage is greater
than typically 92% of the nominal voltage. The signal goes low as soon as the
output voltage falls below this typical threshold. There is an implemented delay
time of 30
µ
s to prevent the power good output from ringing.
Summary of Contents for TPS6110XEVM-216
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