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 Related Documentation From Texas Instruments

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Preface

 

About This Manual

This user’s guide describes the operation of the TPS61020EVM low-power,
dc−dc evaluation module (EVM)

 

for a high-efficiency, boost converter. The

guide includes setup instructions for the hardware, a schematic diagram, a bill
of materials (BOM), and PCB layout drawings for the evaluation module.

How to Use This Manual

This document contains the following chapters:

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Chapter 1—Introduction

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Chapter 2—Evaluation with the TPS61020EVM

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Chapter 3—Schematic, BOM, and PCB layout

Related Documentation From Texas Instruments

TPS61020 data sheet (SLVS451)

FCC Warning

This equipment is intended for use in a laboratory test environment only. It gen-
erates, uses, and can radiate radio frequency energy and has not been tested
for compliance with the limits of computing devices pursuant to subpart J of
part 15 of FCC rules, which are designed to provide reasonable protection
against radio frequency interference. Operation of this equipment in other en-
vironments may cause interference with radio communications, in which case
the user at his own expense will be required to take whatever measures may
be required to correct this interference.

Summary of Contents for TPS61020EVM

Page 1: ...November 2003 Power Management Products User s Guide SLVU100...

Page 2: ...itute a license from TI to use such products or services or a warranty or endorsement thereof Use of such information may require a license from a third party under the patents or other intellectual p...

Page 3: ...handling or use of the goods Please be aware that the products received may not be regulatory compliant or agency certified FCC UL CE etc Due to the open construction of the product it is the user s r...

Page 4: ...If there is uncertainty as to the load specification please contact a TI field representative During normal operation some circuit components may have case temperatures greater than 60 C The EVM is d...

Page 5: ...Chapter 3 Schematic BOM and PCB layout Related Documentation From Texas Instruments TPS61020 data sheet SLVS451 FCC Warning This equipment is intended for use in a laboratory test environment only It...

Page 6: ...iv...

Page 7: ...TPS61020EVM 2 3 3 Schematic BOM and PCB Layout 3 1 3 1 HPA025 EVM Schemataic 3 2 3 2 Bill of Materials 3 2 3 3 PCB Layout of the TPS61020EVM 3 3 2 1 Maximum Output Current vs Input Voltage 2 2 2 2 Ef...

Page 8: ...Contents vi...

Page 9: ...erent device modes as well as the device performance The TPS61020EVM is set to 3 3 V The TPS61020EVM can be easily set up to provide any output voltage between 1 8 V and 5 5 V by adjusting the externa...

Page 10: ...EVM Ordering Information 1 2 1 1 EVM Ordering Information Table 1 1 EVM Ordering Information EVM Number Description TPS61020EVM 025 Adjustable output voltage version set to 3 3 V...

Page 11: ...oltage and input voltage measurements it is important to measure the voltage on the input and output voltage terminals with a voltmeter connected directly to the input voltage or output voltage termin...

Page 12: ...cting the EN pin to DISABLE disables the device 2 3 Mode Selection Jumper PS This jumper is used to choose between PWM and PWR SAV modes of operation Setting the jumper across PWM forces the device in...

Page 13: ...for 3 3 VOUT IL Load Current mA 50 55 60 65 70 75 80 85 90 95 100 10 100 200 300 400 500 600 700 800 900 Efficiency 2 4 VI 1 8 VI 0 9 VI Physically smaller inductors can be used to save board space o...

Page 14: ...2 4...

Page 15: ...Layout This chapter includes the schematic shown in Figure 3 1 bill of materials table and layout for the EVM Topic Page 3 1 HPA025 EVM Schematic 3 2 3 2 Bill of Materials 3 2 3 3 PCB Layout of the T...

Page 16: ...HPA025 Bill of Materials Count Ref Des Description Size MFR Part Number 1 C1 Capacitor ceramic 10 F 10 V X5R 10 805 Murata GRM21BR61A106KE19L 1 C2 Capacitor ceramic 2 2 F 16 V X5R 10 805 TDK C2012X5R...

Page 17: ...t of the TPS61020EVM 3 3 Schematic BOM and PCB Layout 3 3 PCB Layout of the TPS61020EVM The figures below show the layout for the EVM Figure 3 2 Component Placement Figure 3 3 Top Layer Figure 3 4 Bot...

Page 18: ...3 4...

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