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Start Up
2-10
2.9
Start Up
The startup voltage waveforms of the TPS54973EVM−017 are shown in
Figure 2−11 through Figure 2−15. Figure 2−11 shows the start up waveform
with no precharge on the output. When V
I
reaches the nominal 2.95-V UVLO
threshold, the slow start capacitor C5 begins to charge. When the voltage on
the SS/ENA pin reaches the enable threshold of 1.2 V, the internal reference
begins to ramp up at the slow start rate. As the internal reference voltage
increases relative to the voltage at VSENSE, the duty cycle of the PWM
comparator output increases. The internal FETs are inhibited from switching
until the output of the PWM comparator reaches maximum duty cycle. When
maximum duty cycle is reached, switching starts and the output rises quickly
while the output voltage catches up with the slow start ramp rate. At this point
the voltage on the VSENSE pin matches the internal reference and the output
continues to ramp up to the final set point value of 1.8 V at the slow start rate.
Figure 2−11.
Measured Start Up Waveform, TPS54973 With No Precharge
VI 500 mV/div
t − Time − 5 ms/div
VO 500 mV/div
Figure 2−12 shows the start up waveform with the output precharged and a
2-
Ω
load. The precharge is achieved by connecting the 3.3-V input to the
output with two diodes in series. The start up mechanism is the same as
described above except that now the internal reference must ramp up above
the voltage fed back from the precharged output to the VSENSE pin before
switching can start. Once this occurs, the output continues to ramp up to the
output set point of 2.5 V at the slow start rate. Figure 2−13 and Figure 2−14
show the start up waveform with three and four diodes in series. Note the
different levels that the output is precharged to with 2, 3, or 4 diodes in the
circuit.
Summary of Contents for TPS54973EVM-017
Page 1: ...E September 2003 PMP Systems Power User s Guide SLVU091...
Page 6: ...iv...
Page 29: ...Layout 3 3 Board Layout Figure 3 2 Internal Layer 2 Figure 3 3 Internal Layer 3...
Page 30: ...Layout 3 4 Figure 3 4 Bottom Side Layout Figure 3 5 Top Side Assembly...
Page 31: ...Layout 3 5 Board Layout Figure 3 6 Bottom Layer Assembly...