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Background
1-2
1.1
Background
The TPS54973EVM−017 evaluation module uses the TPS54973
synchronous buck regulator with disabled sink during startup (DSDS) to
provide an output voltage from 0.9 V to 2.5 V from a nominal 3.3-V input. Rated
input voltage and output current ranges are listed in Table 1−1. This evaluation
module is designed to demonstrate the small PCB areas that may be achieved
when designing with the TPS54973 regulator. The switching frequency is set
at a nominal 700 kHz, allowing the use of a small footprint 0.6-
µ
H output
inductor.
The MOSFETs of the TPS54973 are incorporated inside the TPS54973
package. This eliminates the need for external MOSFETs and their associated
drivers. The low drain-to-source on resistance of the MOSFETs provides the
TPS54973 high efficiency and helps to keep the junction temperature low at
high output currents. The compensation components are provided external to
the IC and allow for an adjustable output voltage and a customizable loop
response. The disabled sink during startup (DSDS) feature allows the
TPS54973 regulator to be used in applications where it is necessary to prebias
the output to maintain a specified difference between I/O and core voltages
during startup.
Table 1−1. Input Voltage and Output Current Summary
EVM
Input Voltage Range
Output Current Range
TPS54973EVM−017
3.0 V to 4.0 V
−9 A to 9 A
Summary of Contents for TPS54973EVM-017
Page 1: ...E September 2003 PMP Systems Power User s Guide SLVU091...
Page 6: ...iv...
Page 29: ...Layout 3 3 Board Layout Figure 3 2 Internal Layer 2 Figure 3 3 Internal Layer 3...
Page 30: ...Layout 3 4 Figure 3 4 Bottom Side Layout Figure 3 5 Top Side Assembly...
Page 31: ...Layout 3 5 Board Layout Figure 3 6 Bottom Layer Assembly...