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3.2
Sleep State Switches
3.3
Resistors R1 and R2
3.4
User Selectable Configuration Modes
S5
S3
JP1
J8
J7
JP6
JP2
JP4
J5
J1
J3
3.4.1
JP1
VDDQ Reference Voltage
3.4.2
JP1
External Reference Voltage
Schematic
Switches SW1 and SW2 select the S5 and S3 sleep states respectively allowing the user to examine the
reaction of the TPS51100 controller to these memory sleep states.
Resistors R1 and R2 allow the user to provide a divided reference voltage to the VDDQSNS pin of the
TPS51100. If a divided external reference voltage is desired, replace R1 and R2 with the desired resistor
ratio. C1 provides some filtering to keep noise from coupling through the TPS51100, which will attempt to
track any noise on the VDDQSNS voltage.
Figure 2
shows the location of the jumper block and two switches used to adjust the configuration of
TPS51100EVM. The jumper allows the user to select either an external reference voltage or the VDDQ
voltage for the TPS51100’s sense voltage for the VTT and VTT_REF voltages. In either case, VDDQ must
be between 1.5 V and 3.4 V to provide the LDO source voltage for the TPS51100.
Figure 2. TPS51100EVM Jumper Location and Default Position
The TPS51100EVM ships preconfigured to use the VDDQ input voltage as both the LDOIN and
VDDQSNS voltage for the TPS51100. In this configuration, the outputs VTT andVTTREF is ½ the VDDQ
voltage. This is the most common configuration for the TPS51100 as the DDRI/DDRII specifications
require the termination voltage be ½ the core and I/O (VDDQ) voltages. To configure the TPS51100EVM
for VDDQ reference voltage, set JP1 jumper in the left horizontal position.
The TPS51100EVM can be configured to use an external reference voltage (EX_REF) to generate the
VTT and VTTREF termination and buffered reference voltages. This allows the user to evaluate the
TPS51100 under a variety of conditions or adjust the output voltage with an external system. Even in this
configuration, VDDQ must be connected to provide the LDOIN source voltage and current. To configure
the TPS51100EVM for external reference voltage, set the JP1 jumper in the right horizontal position.
Using the TPS51100
4
SLUU201–JULY 2004
