Texas Instruments TMS320C80, User Manual

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Memory Differences
1-12 TMS320C80 to TMS320C82 Software Compatibility User’s Guide
The four words at the end of the PP parameter RAM are shown
in Figure 1–5 (PP1’s in this case). The # sign in each address cor-
responds to the PP number. When a PP is reset, the hardware
sets the stack pointer register (SP) to the highest address in the
PP’s parameter RAM and pushes the before-reset values of the
SP, instruction pointer address stage register (IPA), and instruc-
tion pointer execute stage register (IPE) onto the stack. As shown
in Figure 5, this leaves the SP register pointing to address
010017FCh in the ’C80 and to address 01001FFCh in the ’C82.
For most applications, these addresses are likely to be the best
choices for the initial SP values because they assign the largest
available contiguous block of memory to the combined stack and
general-purpose areas in the parameter RAM.
Figure 1–5. PP State Information on the Stack at Reset
’C80
Address
(Hex)
’C82
Address
(Hex) Word
0100 #7F0 0100 #FF0
Next word in stack
(stack pointer points here after reset)
0100 #7F4 0100 #FF4
IPE value from before reset
0100 #7F8 0100 #FF8
IPA value from before reset
0100 #7FC 0100 #FFC
SP value from before reset