Texas Instruments TLV840EVM User Manual Download Page 13

STANDARD TERMS FOR EVALUATION MODULES

1.

Delivery:

TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or

documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance
with the terms set forth herein. User's acceptance of the EVM is expressly subject to the following terms.

1.1

EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms that accompany such Software

1.2

EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.

2

Limited Warranty and Related Remedies/Disclaimers

:

2.1

These terms do not apply to Software. The warranty, if any, for Software is covered in the applicable Software License
Agreement.

2.2

TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for a nonconforming EVM if (a) the nonconformity was caused by
neglect, misuse or mistreatment by an entity other than TI, including improper installation or testing, or for any EVMs that have
been altered or modified in any way by an entity other than TI, (b) the nonconformity resulted from User's design, specifications
or instructions for such EVMs or improper system design, or (c) User has not paid on time. Testing and other quality control
techniques

are

used

to

the

extent

TI

deems

necessary.

TI

does

not

test

all

parameters

of

each

EVM.

User's claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects in the EVMs within ten (10)
business days after delivery, or of any hidden defects with ten (10) business days after the defect has been detected.

2.3

TI's sole liability shall be at its option to repair or replace EVMs that fail to conform to the warranty set forth above, or credit
User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the warranty
period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to repair or
replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall be
warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.

WARNING

Evaluation Kits are intended solely for use by technically qualified,

professional electronics experts who are familiar with the dangers

and application risks associated with handling electrical mechanical

components, systems, and subsystems.

User shall operate the Evaluation Kit within TI’s recommended

guidelines and any applicable legal or environmental requirements

as well as reasonable and customary safeguards. Failure to set up

and/or operate the Evaluation Kit within TI’s recommended

guidelines may result in personal injury or death or property

damage. Proper set up entails following TI’s instructions for

electrical ratings of interface circuits such as input, output and

electrical loads.

NOTE:

EXPOSURE TO ELECTROSTATIC DISCHARGE (ESD) MAY CAUSE DEGREDATION OR FAILURE OF THE EVALUATION
KIT; TI RECOMMENDS STORAGE OF THE EVALUATION KIT IN A PROTECTIVE ESD BAG.

Summary of Contents for TLV840EVM

Page 1: ...peration 10 4 1 Input Power VDD 10 4 2 Monitoring Voltage on VDD 10 4 3 Reset Output RESET 11 4 4 Reset Time Delay Programming Program tD via CT 11 List of Figures 1 TLV840EVM Board Top 3 2 TLV840EVM...

Page 2: ...2 SNVU704 February 2020 Submit Documentation Feedback Copyright 2020 Texas Instruments Incorporated TLV840EVM Voltage Supervisor User Guide Trademarks All trademarks are the property of their respect...

Page 3: ...X or TLV840PHXX the shunt on J2 must be removed as push pull devices do not use a pull up resistor so R1 must be disconnected If using TLV840EVM with the active high variant TLV840PHXX the active low...

Page 4: ...Power Ultra Low Voltage Supervisor with Ajustable Reset Time Delay data sheet SBVSBC3 1 2 TLV840 Applications Motor Drives Factory Automation and Control Home Theater and Entertainment Electronic Poin...

Page 5: ...Bill of Materials and Layout 5 SNVU704 February 2020 Submit Documentation Feedback Copyright 2020 Texas Instruments Incorporated TLV840EVM Voltage Supervisor User Guide 2 1 TLV840EVM Schematic Figure...

Page 6: ...4 Bumpon Hemisphere 0 44 X 0 20 Clear Transparent Bumpon SJ 5303 CLEAR 3M J1 J2 J3 J5 J6 5 Header 100mil 2x1 TH Header 2x1 100mil TH 800 10 002 10 001000 Mill Max J4 1 Header 100mil 3x1 TH Header 3x1...

Page 7: ...t Figure 4 and Figure 5 show the top and bottom assemblies of the printed circuit board PCB to show the component placement on the EVM Figure 6 and Figure 7 show the top and bottom layouts Figure 8 an...

Page 8: ...and Layout www ti com 8 SNVU704 February 2020 Submit Documentation Feedback Copyright 2020 Texas Instruments Incorporated TLV840EVM Voltage Supervisor User Guide Figure 8 Top Layer Figure 9 Bottom Lay...

Page 9: ...o GND pin Allows user to connect to the ground plane 3 2 EVM Jumpers Table 3 lists the jumpers on the TLV840EVM As ordered the EVM will have five jumpers installed Table 3 List of Onboard Jumpers JUMP...

Page 10: ...ts to logic high Pin 1 of jumper J6 can also be connected to a control signal to set the logic level on MR pin If pin 1 on jumper J6 is logic low the device asserts a reset There is also a test point...

Page 11: ...RESET time delay connect CT pin to a capacitor to GND or leave CT pin floating The reset time delay can be set to a minimum value of 80 s by leaving the CT pin floating or a maximum value of approxim...

Page 12: ...mper on pin 2 middle pin and pin 3 right pin of jumper J4 to connect CT to delay capacitor C3 This connects the CT pin to a 0 01 F capacitor to set the RESET delay tD to 6 2 ms as shown in Figure 15 B...

Page 13: ...ther than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control tec...

Page 14: ...These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not in...

Page 15: ...instructions set forth by Radio Law of Japan which includes but is not limited to the instructions below with respect to EVMs which for the avoidance of doubt are stated strictly for convenience and s...

Page 16: ...any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electr...

Page 17: ...R DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthe...

Page 18: ...e resources are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reprod...

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