ADC Sampling Rate Control
Input Channel Selection
TLV2553EVM-PDK Operation
14
SBAU247A – June 2015 – Revised September 2019
Copyright © 2015–2019, Texas Instruments Incorporated
TLV2553EVM-PDK Evaluation Module
6.4
Performance (or FFT) Analysis Tool
This tool is for evaluating the dynamic performance of the TLV2553EVM through FFT analysis of the ADC
output for time-varying inputs and computation of key dynamic range metrics (such as SNR, THD, SFDR,
SINAD, and ENOB).
The analog input channel of interest can be selected as shown in
The expected ADC input is a sinusoidal signal of peak-to-peak amplitude close to the ADC full-scale input
range (FSR). The RMS power of the input signal normalized to FSR is shown in the
Signal Power (dB)
field and must be approximately –0.5 dBFS (or approximately 95% × FSR) to avoid input clipping.
The sampling rate of the ADC can be adjusted by modifying the
Target Sampling Rate (Hz)
argument,
which is a global setting (it affects all tools). The achievable ADC sampling rate may differ from the target
value, depending on the applied SCLK frequency and PHI PLL settings. Note that the user is also required
to specify a target SCLK frequency that the tool tries to match as exactly as possible by changing the PHI
PLL settings in an iterative fashion until convergence.
Figure 13. FFT Tool Input Parameters
Finally, the FFT tool includes windowing options that are required to mitigate the effects of non-coherent
sampling (this discussion is beyond the scope of this document). The
7-Term Blackman Harris
window is
the default option and has sufficient dynamic range to resolve the frequency components of up to a 24-bit
ADC. Note that the
None
option corresponds to not using a window (or using a rectangular window) and is
not recommended.
