6.3 Schematics
shows the TLA2024EVM-PDK schematic.
ADC
VDD
GND
0.1uF
C8
GND
AIN0
AIN2
AIN1
AIN3
GND
GND
GND
GND
1uF
C9
GND
VDD
10k
R6
DNP
LP_3V3
10k
R5
DNP
ALERT/RDY
ADDR
LP_3V3
LP_5V
Launchpad Connectors
10
µ
F
C14
10
µ
F
C13
GND
GND
GND
SCL_ADC
SDA_ADC
ADDR
VDD
TCA9406DCTR
SDA_B
1
GND
2
VCCA
3
SDA_A
4
SCL_A
5
OE
6
VCCB
7
SCL_B
8
U2
LP_3V3
GND
SCL_ADC
SDA_ADC
GND
SCL_LP
SDA_LP
0.1uF
C10
0.1uF
C11
GND
10k
R7
GND
VDD
GND
ALERT/RDY
4.70k
R9
4.70k
R8
4.70k
R11
4.70k
R12
VDD
VDD
LP_3V3
LP_3V3
I2C Level Shifter
+3.3V
1
Analog_In
2
LP_UART_RX
3
LP_UART_TX
4
GPIO !
5
Analog In
6
SPI_CLK
7
GPIO !
8
I2C_SCL
9
I2C_SDA
10
+5V
21
GND
22
Analog_In
23
Analog_In
24
Analog_In
25
Analog_In
26
Analog_In/I2S_WS
27
Analog_In/I2S_SCLK
28
Analog_Out/I2S_SDout
29
Analog_Out/I2S_SDin
30
J1/J3
SSQ-110-03-T-D
GPIO !
31
GPIO !
32
GPIO !
33
GPIO !
34
Timer_Cap/GPIO !
35
Timer_Cap/GPIO !
36
PWM/GPIO !
37
PWM/GPIO !
38
PWM/GPIO !
39
PWM/GPIO !
40
GPIO !
11
SPI_CS/GPIO !
12
SPI_CS/GPIO !
13
SPI_MISO
14
SPI_MOSI
15
RST
16
GPIO
17
GPIO !
18
PWM/GPIO !
19
GND
20
J2/J4
SSQ-110-03-T-D
GND
ALERT/RDY
SCL_LP
SDA_LP
A0
1
A1
2
A2
3
VSS
4
SDA
5
SCL
6
WP
7
VCC
8
U3
BR24G32FVT-3AGE2
LP_3V3
GND
SCL_LP
SDA_LP
GND
0.1uF
C12
10k
R10
10k
R13
EEPROM Memory
1
2
3
4
5
6
J6
GND
AIN0
AIN2
AIN1
AIN3
1
2
3
4
5
J5
ED555/5DS
EEPROM_WE
EEPROM_WE
47nF
C5
47nF
C6
DNP
47nF
C7
4.7nF
C2
4.7nF
C3
4.7nF
C4
499
R1
499
R2
499
R3
499
R4
0
R14
DNP
2
1
3
JP1
4.7nF
C1
ADDR
1
NC
2
GND
3
AIN0
4
AIN1
5
AIN2
6
AIN3
7
VDD
8
SDA
9
SCL
10
TLA2024IRUGR
U1
TP1
TP6
DNP
TP2
TP3
GND
TP4
DNP
TP5
DNP
Figure 6-5. TLA2024EVM-PDK Schematic
Bill of Materials, Printed Circuit Board Layout, and Schematics
36
TLA2024EVM-PDK User's Guide
SBAU368 – FEBRUARY 2021
Copyright © 2021 Texas Instruments Incorporated