Texas Instruments THS3062EVM User Manual Download Page 10

Evaluation Schematic

1-2

The noninverting gain of the EVM channel 1 amplifier, when using the default
configuration, is affected by the same slight gain error plus the gain error im-
posed by the inverting input termination resistor, R2. The following equation
shows the gain for this situation:

V

O

V

I

+

ǒ

1

)

R6

R1

)

R2

Ǔ

ǒ

R4

ø

50

W

R4

ø

50

W

)

R5

Ǔ

+

0.908

(2)

EVM Channel 2:

The default configuration for EVM channel 2 provides for a voltage gain of +1.
This voltage gain is the ratio of the voltage at the output pin of the amplifier (pin
7) to the voltage at the input at J5. For optimum frequency response and stabil-
ity at a gain of +1 the feedback resistor, R7, of 750 

Ω 

was chosen.

The noninverting gain of the EVM channel 2 amplifier, when using the default
configuration, is affected by the same slight gain error caused by R12 as
shown in Equation 1 and indicated in the following equation:

V

O

V

I

+

ǒ

*

R12

ø

50

W

R12

ø

50

W

)

R11

Ǔ

+ *

0.475

(3)

THS3062 dual high-speed operational amplifier EVM features include:

-

Wide operating supply voltage range: dual supply 

±

5 Vdc to dual supply

±

15 Vdc operation (see the device data sheet). Single supply operation is

obtained by connecting both J6 (GND) and J7 (VS-) to ground.

-

Convenient GND test point (TP1).

-

Power supply ripple rejection provided by inductors FB1 and FB2 followed
by tantalum capacitors C5 and C6.

-

Decoupling capacitors, C7and C8, populated with 0.1 

µ

F and capacitors,

C9 and C10, populated with 100 pF—design final decoupling in accor-
dance with SLOA069.

-

Nominal 50-

 input impedance for each of the configured inputs, V1in-,

V1in+ and V2in+. Termination can be configured according to the applica-
tion requirement.

-

A good example of high-speed amplifier PCB design and layout. Also see
High-Speed Amplifier PCB Layout Tips, SLOA102

.

-

50-

 series matching resistors (R5 and R11).

-

953-

 resistor to ground provide minimum load through 1 k

 on each

amplifier.

-

PowerPAD heatsinking capability.

Summary of Contents for THS3062EVM

Page 1: ...THS3062EVM September 2002 High Performance Linear Products User s Guide SLOU146...

Page 2: ...t that any license either express or implied is granted under any TI patent right copyright mask work right or other TI intellectual property right relating to any combination machine or process in wh...

Page 3: ...handling or use of the goods Please be aware that the products received may not be regulatory compliant or agency certified FCC UL CE etc Due to the open construction of the product it is the user s r...

Page 4: ...M Please consult the EVM User s Guide prior to connecting any load to the EVM output If there is uncertainty as to the load specification please contact a TI field representative During normal operati...

Page 5: ...on Information About Cautions and Warnings This book may contain cautions and warnings This is an example of a caution statement A caution statement describes a situation that could potentially damage...

Page 6: ...bag when not in use Handle using an antistatic wristband Operate on an antistatic work surface For more information on proper handling refer to SSYA008 Related Documentation From Texas Instruments Th...

Page 7: ...M Channel 2 3 2 4 EVM Hardware Description 4 1 Figures 1 1 Schematic of the THS3062EVM 1 3 2 1 THS3062EVM Interconnection Diagram 2 1 3 1 Inverting Gain Stage 3 1 3 2 Noninverting Gain Stage 3 2 4 1 T...

Page 8: ...Contents vi...

Page 9: ...of the voltage at the output pin of the amplifier pin 1 to the voltage at the input at J2 or J3 respectively For optimum frequency response and stability at either 1 or 2 gain a feedback resistor R6...

Page 10: ...ated in the following equation V O V I R12 50 W R12 50 W R11 0 475 3 THS3062 dual high speed operational amplifier EVM features include Wide operating supply voltage range dual supply 5 Vdc to dual su...

Page 11: ...7 R5 U1B 5 6 7 C9 100 pF R6 R3 R4 R12 GND J3 V1in VS 8 J2 V1in J6 V2out R10 TP1 4 3 2 1 TP2 J4 V2in R2 U1A C10 100 pF C8 VS J1 V1out J8 R11 J5 V2in C7 VS IN FB2 C6 J7 J9 C5 VS VS IN FB1 VS THS3062 R8...

Page 12: ...1 4...

Page 13: ...t power supplies a 50 signal source and a 50 monitoring instrument Figure 2 1 THS3062EVM Interconnection Diagram Figure 2 1 shows the connections to measure the output of output 1 while a signal is in...

Page 14: ...2 2...

Page 15: ...d to a 50 measurement input device R4 953 was included to provide a 1 k load to the amplifier the user may remove it as shown in Figure 3 1 When this is done the voltage gain equation from J2 to J1 is...

Page 16: ...asurement instruments the nominal line impedance is assumed to be 50 for video the nominal line impedance is assumed to be 75 If testing this device as a video linear driver we recommend changing the...

Page 17: ...AQ12EM101JAJME TTI AQ12EM101JAJME 5 Open 0805 R8 1 6 Resistor 750 1 8 W 1 0805 R7 1 Phycomp 9C08052A7500FKHFT Garrett 9C08052A7500FKHFT 7 Resistor 562 1 8 W 1 0805 R1 R6 2 Phycomp 9C08052A5620FKHFT Ga...

Page 18: ...4 2 Figure 4 1 Top Layer 1 Signals and Silkscreen for THS3062EVM Figure 4 2 Internal Plane Layer 2 Ground Plane...

Page 19: ...4 3 EVM Hardware Description Figure 4 3 Internal Plane Layer 3 Power Layer Figure 4 4 Bottom Layer 4 Ground and Signal...

Page 20: ...4 4...

Page 21: ...401 Building No 5 JiuGe Business Center Lane 2301 Yishan Rd Minhang District Shanghai China Sales Direct 86 21 6401 6692 Email amall ameya360 com QQ 800077892 Skype ameyasales1 ameyasales2 Customer Se...

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