Applying an Input
2-3
Setup and Equipment Required
2.2
Applying an Input
When using a general-purpose signal generator with 50-
Ω
output impedance,
make sure that the signal levels are between 0-V and 4-V with respect to J19,
device under test ground (DUT GND), designated as Vcc01.
Inputs should be applied to the SMA connectors J1, J2, J3, and J4 for DUT1
(or J9, J10, J11 and J12 for DUT2). Matched cable lengths must be used when
connecting the signal generator to the EVM to avoid inducing skew between
the noninverting and inverting inputs. The EVM comes with 100-
Ω
resistors
installed across the differential inputs for LVDS termination. The simple 100-
Ω
terminations do not provide the necessary termination for LVPECL or CML
[1]
output structures. In order to interface the SN65LVCP22/23 EVM with CML or
LVPECL drivers, external terminations are required. Figure 2–2 shows an
example termination for LVPECL and CML output structures. Remove
resistors R1, R2, R10 and R19 when using the external terminations.
Figure 2–2. External Termination for Interfacing CML or LVPECL Drivers
IN+
IN–
VTT for LVPECL
VCC for CML
LVPECL or CML
Driver
VTT for LVPECL
VCC for CML
50
Ω
50
Ω
EVM (Inputs 1 or 2)
The use of external resistors creates a significant stub between the
termination and the actual device receivers. The user needs to verify that the
transition time of the input signal, coupled with the stub length, does not lead
to reflection problems. In normal applications, the termination would be placed
as close as possible to the device inputs to minimize reflections.
The control lines SEL0 and SEL1 require LVTTL levels and are stimulated by
the Vcc power supply, via jumpers JMP1 and JMP2 (DUT1) and JMP5 and
JMP6 (DUT2). Table 2–1 shows the different functions and the control line
settings for each.
[1]CML is not a standardized physical layer and therefore the output structures and required termination differ from vendor
to vendor.
