Texas Instruments SN65LVCP22 User Manual Download Page 22

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Board Layout Patterns

3-5

EVM Construction

Figure 3–5. Layer 2 – GND Plane

Figure 3–6. Layer 3 – Split Plane (V

CC01

)

Summary of Contents for SN65LVCP22

Page 1: ... June 2003 HPL Interface User s Guide SLLU060 ...

Page 2: ...titute a license from TI to use such products or services or a warranty or endorsement thereof Use of such information may require a license from a third party under the patents or other intellectual property of the third party or a license from TI under the patents or other intellectual property of TI Reproduction of information in TI data books or data sheets is permissible only if reproduction ...

Page 3: ... handling or use of the goods Please be aware that the products received may not be regulatory compliant or agency certified FCC UL CE etc Due to the open construction of the product it is the user s responsibility to take any and all appropriate precautions with regard to electrostatic discharge EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR A...

Page 4: ...ertainty as to the load specification please contact a TI field representative During normal operation some circuit components may have case temperatures greater than 60 C The EVM is designed to operate properly with certain components above 60 C as long as the input and output ranges are maintained These components include but are not limited to linear regulators switching transistors pass transi...

Page 5: ... 2 Setup and Equipment Required Chapter 3 EVM Construction Chapter 4 PCB Fabrication and Bill of Materials This user s guide may contain cautions and warnings The information in a caution or a warning is provided for your protection Please read each caution and warning carefully Related Documentation From Texas Instruments SN65LVCP22 LVDS crosspoint switch data sheet SLLS553 SN65LVCP23 LVPECL cros...

Page 6: ...nents that can potentially be damaged by electrostatic discharge Always transport and store the EVM in its supplied ESD bag when not in use Handle using an antistatic wristband Operate on an antistatic work surface For more information on proper handling refer to SSYA008 ...

Page 7: ... 2 1 Overview 2 2 2 2 Applying an Input 2 3 2 3 Observing an Output 2 4 2 4 Typical Test Results 2 5 3 EVM Construction 3 1 3 1 Schematics 3 2 3 2 Board Layout Patterns 3 4 4 PCB Fabrication and Bill of Materials 4 1 4 1 PCB Fabrication Notes and Stackup 4 2 4 2 Bill of Materials for SN65LVCP22 23 EVM 4 2 ...

Page 8: ... Inputs 2 2 2 2 External Termination for Interfacing CML or LVPECL Drivers 2 3 2 3 Typical Test Results of the SN65LVCP23 with the SN65LVCP22 23EVM 2 5 3 1 SN65LVCP22D Schematic 3 2 3 2 SN65LVCP23D Schematic 3 3 3 3 SN65LVCP22 23 Silk Screen 3 4 3 4 Layer 1 Signal Plane 3 4 3 5 Layer 2 GND Plane 3 5 3 6 Layer 3 Split Plane VCC VCC01 3 5 3 7 Layer 4 GND Plane 3 6 2 1 Crosspoint Function Table 2 4 ...

Page 9: ...Introduction The SN65LVCP22 23 EVM highlights the high speed performance and functionality of the SN65LVCP22 and SN65LVCP23 2x2 crosspoint switches Topic Page 1 1 Overview 1 2 1 2 Signal Paths 1 3 Chapter 1 ...

Page 10: ... accept LVDS LVPECL and CML signaling levels Figure 1 1 Functional Configurations of the SN65LVCP22 and SN65LVCP23 IN0 OUT0 IN IN 1 OR 2 2x2 Crosspoint 1 2 Splitter Dual Repeater OUT OUT 1 OR 2 2 1 MUX IN0 IN1 IN1 IN0 IN0 IN1 IN1 IN0 IN0 IN1 IN1 OUT1 OUT1 OUT0 OUT0 OUT1 OUT1 OUT0 OUT0 OUT1 OUT1 OUT0 MUX Figure 1 2 is a picture of the SN65LVCP22 23 EVM The EVM part number is SN65LVCP22 23EVM The EV...

Page 11: ...tions See Figure 1 3 Figure 1 3 SN65LVCP22 23 EVM J10 J9 J13 J15 VCC 1 1 6 GND J11 J12 J16 J14 J1 J2 J3 J4 J5 J6 J7 J8 VCC GND C1 C2 C3 C4 C5 C6C7 C8 C9C10 1 J18 J19 J17 uninstalled R16 uninstalled R15 R14 uninstalled uninstalled R13 R12 R11 uninstalled SEL0 SEL1 EN1 EN0 JMP5 JMP6 JMP7 JMP8 100 Ω 16 1 DUT2 C 17 0 010µF R19 R10 100 Ω SEL0 SEL1 EN1 EN0 JMP1 JMP2 JMP3 JMP4 100 Ω R1 R2 100 Ω 0 010µF C...

Page 12: ...1 4 ...

Page 13: ...2 1 Setup and Equipment Required Topic Page 2 1 Overview 2 2 2 2 Applying an Input 2 3 2 3 Observing an Output 2 4 2 4 Typical Test Results 2 5 Chapter 2 ...

Page 14: ...he driver This common mode loading limitation of LVDS drivers affects how they are observed and much of the test setup that follows The EVM is designed to support the SN65LVCP22 LVDS output device as well as the SN65LVCP23 LVPECL output device By using the three power jacks J17 J18 J19 as well as installing termination resistors R3 R8 and R11 R16 different methods of termination and probing can be...

Page 15: ...2 2 shows an example termination for LVPECL and CML output structures Remove resistors R1 R2 R10 and R19 when using the external terminations Figure 2 2 External Termination for Interfacing CML or LVPECL Drivers IN IN VTT for LVPECL VCC for CML LVPECL or CML Driver VTT for LVPECL VCC for CML 50 Ω 50 Ω EVM Inputs 1 or 2 The use of external resistors creates a significant stub between the terminatio...

Page 16: ... connectors J5 J8 DUT1 and J13 J16 DUT2 With power applied as shown in Figure 2 1 the common mode voltage seen by the SN65LVCP22 is approximately equal to the reference voltage being used inside the device preventing significant common mode current to flow Optimum device setup can be confirmed by adjusting the voltage on power supply 2 until its current is minimized It is important to note that us...

Page 17: ... OUT0 OUT0 and inputs IN1 IN1 to outputs OUT1 OUT1 by setting EN0 and EN1 to a high level and by setting SEL0 to Gnd and SEL1 to Vcc The stimuli were a 223 1 PRBS to J1 and J2 at 1 3 Gbps and a 650 MHz clock to J3 and J4 The input levels for both clock and data were a differential voltage of 400 mV with a common mode voltage of 0 V referenced to the ground of the pattern generator Figure 2 3 Typic...

Page 18: ...3 1 EVM Construction Topic Page 3 1 Schematics 3 2 3 2 Board Layout Patterns 3 4 Chapter 3 ...

Page 19: ... GND GND GND GND GND GND GND GND J2 C5 C10 C2 R6 R5 UNINSTALLED C7 J3 C11 1 2 3 JMP3 3pin_berg C1 R4 UNINSTALLED J17 R7 C6 R3 UNINSTALLED J4 R8 J8 1 2 3 JMP4 3pin_berg C3 J1 J19 1 2 3 JMP2 3pin_berg C8 DUT1 SN65LVCP22D 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 R1 J6 J7 C4 1 2 3 JMP1 3pin_berg J5 J18 C9 R2 IN0 UNINSTALLED UNINSTALLED 10µF 68 µF 1µF 0 1 µF 0 001 µF 10µF 68 µF 1µF 0 1 µF 0 001 µF 100 Ω ...

Page 20: ...1 VCC VCC01 VCC VCC01 VCC01 VCC GND GND GND GND GND GND 1 2 3 JMP7 3pin_berg J13 C17 J16 R19 J9 R13 UNINSTALLED 1 2 3 JMP5 3pin_berg J15 J10 1 2 3 JMP8 3pin_berg R11 UNINSTALLED J11 R12 UNINSTALLED R10 R16 UNINSTALLED J12 J14 1 2 3 JMP6 3pin_berg R14 UNINSTALLED R15 UNINSTALLED DUT2 SN65LVCP23D 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 010 µ F 100Ω 100Ω VCC VCC ...

Page 21: ...Board Layout Patterns 3 4 3 2 Board Layout Patterns Figure 3 3 SN65LVCP22 23 Silk Screen Figure 3 4 Layer 1 Signal Plane ...

Page 22: ...Board Layout Patterns 3 5 EVM Construction Figure 3 5 Layer 2 GND Plane Figure 3 6 Layer 3 Split Plane VCC VCC01 ...

Page 23: ...Board Layout Patterns 3 6 Figure 3 7 Layer 4 GND Plane ...

Page 24: ...4 1 PCB Fabrication and Bill of Materials Topic Page 4 1 PCB Fabrication Notes and Stackup 4 2 4 2 Bill of Materials 4 2 Chapter 4 ...

Page 25: ... 0 001 inch 8 Minimum allowable line reduction to be 20 or 0 002 inch whichever is greater 9 0 0125 inch signal lines on layer 1 to be impednace controlled 100 W to each other 10 10 Dielectric constants are core 3 9 11 Fill vias that are in a pad are prepreg 3 9 4 2 Bill of Materials for SN65LVCP22 23 EVM Comment Quantity Components 10 µF 35V 10 2 C1 C6 68 µF 10 V 20 Low ESR 2 C2 C7 1 µF 25 V 80 2...

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