Texas Instruments OMAP36 Series, Technical Reference Manual, Page: 811 / 3738

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IVA2.2 Subsystem Register Manual
Bits Field Name Description Type Reset
7 IDM7 Dropped event mask for CPU interrupt #7 RW 0
6 IDM6 Dropped event mask for CPU interrupt #6 RW 0
5 IDM5 Dropped event mask for CPU interrupt #5 RW 0
4 IDM4 Dropped event mask for CPU interrupt #4 RW 0
3:0 Reserved Write 0 for future compatibility RW 0
Read returns 0
Table 5-45. Register Call Summary for Register INTDMASK
IVA2.2 Subsystem Functional Description
• INTC : [0]
IVA2.2 Subsystem Basic Programming Model
• Interrupt Exception Programming Sequence : [1]
• Interrupt Controller Basic Programming Model for Power Down of IVA2.2 Subsystem : [2]
• Interrupt Controller Basic Programming Model for Power On of IVA2.2 Subsystem : [3] [4]
IVA2.2 Subsystem Register Manual
• IC Register Mapping Summary : [5]
Table 5-46. EVTASRT
Address Offset 0x0000 01C0
Physical address 0x0180 01C0 Instance IVA2.2 GEMIC
Description Event Assert Register
Type W
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
MXF7 MXF6 MXF5 MXF4 MXF3 MXF2 MXF1 MXF0
Bits Field Name Description Type Reset
31:8 Reserved write 0 for future compatibility W 0
7 MXF7 Event Assert output #7 W 0
EA7 = 0: No effect
EA7 = 1: EVTOUT7 pulsed high for 4 clk1 cycles, then low.
6 MXF6 Event Assert output #6 W 0
EA6 = 0: No effect
EA6 = 1: EVTOUT6 pulsed high for 4 clk1 cycles, then low.
5 MXF5 Event Assert output #5 W 0
EA5 = 0: No effect
EA5 = 1: EVTOUT5 pulsed high for 4 clk1 cycles, then low.
4 MXF4 Event Assert output #4 W 0
EA4 = 0: No effect
EA4 = 1: EVTOUT4 pulsed high for 4 clk1 cycles, then low.
3 MXF3 Event Assert output #3 W 0
EA3 = 0: No effect
EA3 = 1: EVTOUT3 pulsed high for 4 clk1 cycles, then low.
2 MXF2 Event Assert output #2 W 0
EA2 = 0: No effect
EA2 = 1: EVTOUT2 pulsed high for 4 clk1 cycles, then low.
1 MXF1 Event Assert output #1 W 0
EA1 = 0: No effect
EA1 = 1: EVTOUT1 pulsed high for 4 clk1 cycles, then low.
0 MXF0 Event Assert output #0 W 0
EA0 = 0: No effect
EA0 = 1: EVTOUT0 pulsed high for 4 clk1 cycles, then low.
811 SWPU177N – December 2009 – Revised November 2010 IVA2.2 Subsystem
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