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SDTI Module
As a simple compression scheme for serial bandwidth improvement, in case of consecutive writes to the
same message channel, the channel address is omitted from a message. For particular message
encoding, see
, SDTI Data Format. Because initiators are not differentiated on L4_EMU
compression, the scheme is based only on the address accessed. Consecutive accesses to the same
address originating from various initiators activates compression.
The SDTI does not lose messages. If it is necessary, the SDTI stalls its interface until there is enough
space in the FIFO to store new messages.
A valid write access to the trace address matching window with an all-zeroes byte-enable pattern do not
trigger a message.
The SDTI starts to output serial data as soon as it has at least one captured line in the FIFO.
27.3.4.4 Trace Buffer FIFO
The SDTI FIFO is organized as listed in
Table 27-34. FIFO Data Organization
Field
Size (Bits)
Timestamped message (end message marker)
1
CPU1/CPU2
1
Channel number
8
Data size (in bytes)
2
Data
32
When full, the SDTI FIFO stalls L4_EMU by not acknowledging the write access. When FIFO room
becomes available, the SDTI can capture a new message.
The SDTI FIFO status can be polled by reading the
[8] FIFOEMPTY bit. FIFOEMPTY
reflects the state of SDTI buffering, including the SDTI FIFO and serial interface shift register. When read
as 1, there is no more data in the SDTI to be exported.
Check the SDTI FIFO status before powering down the EMU domain or changing the serial interface
configuration.
27.3.4.5 Serial Interface Test Pattern Generation
To support calibration, tuning, and testing, the SDTI includes a test pattern generator, which drives the
serial interface when testing mode is selected.
When serial interface test mode is selected and the SDTI is enabled, the SDTI continuously exports test
patterns until it is disabled. For the test mode enable procedure, see
, Serial Interface
Test Mode Setup.
lists the different patterns that are supported.
Table 27-35. Test Pattern Format
Pattern Name
Pattern Example
Simple A
0x5, 0xA
Simple F
0x0, 0xF
Walking ones
0x0, 0x1, 0x2, 0x4, 0x8
Ramp (incremental counter)
0x0, 0x1, 0x2,..., 0xF, 0x0,...
Pseudo random (LFSR)
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3615
SWPU177N – December 2009 – Revised November 2010
Debug and Emulation
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