Public Version
McSPI Register Manual
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Table 20-32. MCSPI_SYST
Address Offset
0x24
Physical Address
0x4809 8024
Instance
MCSPI1
0x4809 A024
MCSPI2
0x480B 8024
MCSPI3
0x480B A024
MCSPI4
Description
This register is used to check the correctness of the system interconnect either internally to peripheral bus, or
externally to device IO pads, when the module is configured in system test (SYSTEST) mode.
Type
RW
Write Latency
Immediate
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Reserved
SSB
WAKD
PIEN_2
SPICLK
SPIEN_3
SPIEN_1
SPIEN_0
SPIENDIR
SPIDAT_1
SPIDAT_0
SPIDATDIR1
SPIDATDIR0
Bits
Field Name
Description
Type
Reset
31:12
Reserved
Reads returns 0
RW
0x00000
11
SSB
Set status bit
RW
0
0x0:
No action. Writing 0 does not clear already set status
bits;
This bit must be cleared prior attempting to clear a
status bit of the MCSPI_ IRQSTATUS register.
0x1:
Force to 1 all status bits of MCSPI_ IRQSTATUS
register.
Writing 1 into this bit sets to 1 all status bits contained in
the
register.
10
SPIENDIR
Set the direction of the spim_cs lines and spim_clk line
RW
0
0x0:
Output (as in master mode)
0x1:
Input (as in slave mode)
9
SPIDATDIR1
Set the direction of the SPIDAT[1] (spim_simo)
RW
0
0x0:
Output
0x1:
Input
8
SPIDATDIR0
Set the direction of the SPIDAT[0] (spim_somi)
RW
0
0x0:
Output
0x1:
Input
7
WAKD
SWAKEUP output (signal data value of internal signal to system).
RW
0
The signal is driven high or low according to the value written into
this register bit.
0x0:
The pin is driven low.
0x1:
The pin is driven high.
6
SPICLK
spim_clk line (signal data value)
RW
0
If
[SPIENDIR] = 1 (input mode direction), this bit
returns the value on the spim_clk line (high or low) and a write
into this bit has no effect.
If
[SPIENDIR] = 0 (output mode direction), the
spim_clk line is driven high or low according to the value written
into this register.
5
SPIDAT_1
spim_somi line (signal data value)
RW
0
If
[SPIDATDIR1] = 0 (output mode direction), the
spim_somi line is driven high or low according to the value written
into this register.
3042
Multichannel SPI
SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated