Public Version
HDQ/1-Wire Register Manual
www.ti.com
Bits
Field Name
Description
Type
Reset
31:2
Reserved
Reads return 0s.
R
0x00000000
1
SOFTRESET
Start soft reset sequence.
RW
0
0x0:
Disabled
0x1:
Enabled
0
AUTOIDLE
Interconnect idle
RW
0
0x0:
Module clock is free-running.
0x1:
Module is in power saving mode: Clock is running only
when module is accessed or inside logic is in function to
process events.
Table 18-19. Register Call Summary for Register HDQ_SYSCONFIG
HDQ/1-Wire Integration
•
:
HDQ/1-Wire Functional Description
•
:
HDQ/1-Wire Basic Programming Model
•
:
HDQ/1-Wire Use Cases and Tips
•
Pad Configuration and HDQ/1-Wire clock and power management
•
HDQ/1-Wire Register Manual
•
HDQ/1-Wire Register Mapping Summary
Table 18-20. HDQ_SYSSTATUS
Address Offset
0x018
Physical Address
0x480B 2018
Instance
HDQ/1-Wire
Description
This register monitors the reset sequence.
Type
R
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Reserved
RESETDONE
Bits
Field Name
Description
Type
Reset
31:1
Reserved
Reads return 0s.
R
0x00000000
0
RESETDONE
Reset monitoring
R
0x-
0x0:
The module is currently performing its reset. When the
module is in power-down mode, set to 0 to indicate this
fact.
0x1:
The module has finished its reset.
Table 18-21. Register Call Summary for Register HDQ_SYSSTATUS
HDQ/1-Wire Use Cases and Tips
•
HDQ/1-Wire Register Manual
•
HDQ/1-Wire Register Mapping Summary
2866HDQ/1-Wire
SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated