Texas Instruments OMAP36 Series, Technical Reference Manual, Page: 1695 / 3738

Public Version
www.ti.com
Display Subsystem Functional Description
7.4.7.6 Wide-Screen Signaling (WSS) Encoding
The encoder can embed data, encoded in accordance with the IEC61880 and ITU-R 1119 data insertion
standard, within the vertical blanking interval.
The encoder supports WSS data insertion on line 20 of every frame in the NTSC format. WSS data
insertion is enabled by activating the DSS.
VENC_L21_WC_CTL [14:13] EVEN_ODD_EN bit and by
programming the VENC_BSTAMP_WSS_DATA [27:8] WSS_DATA bit field.
The running clock frequency is controlled by the DSS. VENC_CC_CARR_WSS_CARR [31:16] FWSS bit
field. The wide-screen signaling running clock common frequencies are detailed in Table 7-44
Table 7-44. Wide-Screen Signaling Run Clock Frequency Settings
NTSC Square
NTSC-601 PAL-601 PAL Square Pixel
Pixel
VENC_CC_CARR_WSS_C
ARR [31:16] FWSS bit field 0x043F 0x2F72 0x04AC 0x2B6D
value
To select the line where the WSS data are encoded, program the DSS. VENC_L21_WC_CTL [12:8] LINE
bit field.
CAUTION
The setting of the LINE[12:8] bit field value depends on the video standard:
• PAL mode: There is an one line offset, so program the wanted line number -
1. The recommended value is line 0x16 + 1 = 0x17 (23rd line). Note that the
default value is 0x14 + 1 = 0x15 (21st line).
• NTSC mode: There is a four line offset, so program the wanted line number
- 4. The recommended value is line 0x10 + 4 = 0x14 (20th line). Note that
the default value is 0x14 + 4 = 0x18 (24th line).
The WSS encoding block assumes that a full 10-bit video range is used to determine the 70 percent of
peak-white amplitude of a logic-1 bit. The encoder also supports WSS data insertion on line 23 in the PAL
format. Both waveforms are shown in
Figure 7-108 .
1695 SWPU177N – December 2009 – Revised November 2010 Display Subsystem
Copyright © 2009–2010, Texas Instruments Incorporated