Texas Instruments OMAP36 Series, Technical Reference Manual

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Camera ISP Register Manual
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Bits Field Name Description Type Reset
4:3 READ_THROTTLE Limit maximum data read speed for memory-to-memory RW 0x0
operation.
0x0: Full speed. Throughput is limited by internal
processing capabilities.
0x1: 1/2 speed
0x2: 1/4 speed
0x3: 1/8 speed
2 DST_PORT Select the destination port. RW 0x0
0x0: Data is sent to video port; it is always sent without
compression or packing. The
CCP2_LCM_CTRL .DST_PACK,
CCP2_LCM_DST_ADDR and CCP2_LCM_DST_OFST
registers have no effect.
0x1: Data is sent to memory.
1 RESERVED Write 0s for future compatibility. Read returns 0. RW 0x0
0 CHAN_EN Enables the read from the memory channel RW 0x0
Before enabling the memory read channel, the software
must:
- Disable the physical interface using the IF_EN bit
- Wait until disabling of the physical interface is effective
(depends on the FRAME bit)
Read from memory starts when this bit is set; therefore,
all CCP2_LCM_x registers must be configured correctly
before the bit is set.
This bit is cleared by hardware at the end of the frame.
0x0: Disabled
0x1: Enabled
Table 6-195. Register Call Summary for Register CCP2_LCM_CTRL
Camera ISP Functional Description
• Camera ISP CSI1/CCP2B Memory Read Channel : [4] [5] [6] [7] [8] [9] [10] [11] [12]
Camera ISP Basic Programming Model
• Camera ISP CSI1/CCP2B Read Data from Memory : [13] [14] [15] [16] [17] [18] [19] [20]
Camera ISP Register Manual
• Camera ISP CCP2 Register Summary : [21]
• Camera ISP CCP2 Register Description : [22]
Table 6-196. CCP2_LCM_VSIZE
Address Offset 0x0000 01D4
Physical Address 0x480B C5D4 Instance ISP_CCP2
Description Memory channel vertical framing register
Type RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
COUNT RESERVED
RESERVED
Bits Field Name Description Type Reset
31:29 RESERVED Write 0s for future compatibility. Read returns 0. RW 0x0
28:16 COUNT Defines the line count to be read from memory RW 0x001
From 1 to 8191 lines.
15:0 RESERVED Write 0s for future compatibility. Read returns 0. RW 0x0000
1368 Camera Image Signal Processor SWPU177N – December 2009 – Revised November 2010
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