Public Version
Camera ISP Basic Programming Model
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•
CONTROL_PADCONF_CSI2_DX1[24] INPUTENABLE1 = 0x1
•
CONTROL_PADCONF_CSI2_DX1[20] PULLTYPESELECT1 = 0x0
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CONTROL_PADCONF_CSI2_DX1[19] PULLUDENABLE1 = 0x1
(e) Power up the CSIPHY:
(i) Set
[28:27] PWR_CMD to 0x1.
(f) Check that the state status reaches the ON state:
•
[26:25] PWR_STATUS = 0x1
(g) Wait for STOPSTATE = 1 (for all enabled lane modules):
(i) The timer is set through the
[14:0] bit field. The reset value can be kept.
(ii) Wait until
[15] FORCE_RX_MODE_IO1 = 0x0. It is automatically put at 0 when
all enabled lanes are in STOPSTATE and the timer is finished.
(h) Release PIPD* (= 1):
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For CSIPHY1: Pull up on signals through padconf registers:
–
cam_d6:
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CONTROL_PADCONF_CAM_D5[20] PULLTYPESELECT1 = 0x1
–
cam_d7:
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CONTROL_PADCONF_CAM_D7[4] PULLTYPESELECT0 = 0x1
–
cam_d8:
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CONTROL_PADCONF_CAM_D7[20] PULLTYPESELECT1 = 0x1
–
cam_d9:
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CONTROL_PADCONF_CAM_D9[4] PULLTYPESELECT0 = 0x1
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For CSIPHY2: Pull up on signals through padconf registers:
–
cam_d0:
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CONTROL_PADCONF_CAM_FLD[20] PULLTYPESELECT1 = 0x1
–
cam_d1:
•
CONTROL_PADCONF_CAM_D1[4] PULLTYPESELECT0 = 0x1
–
csi2_dx0:
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CONTROL_PADCONF_CSI2_DX0[4] PULLTYPESELECT0 = 0x1
–
csi2_dy0:
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CONTROL_PADCONF_CSI2_DX0[20] PULLTYPESELECT1 = 0x1
–
csi2_dx1:
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CONTROL_PADCONF_CSI2_DX1[4] PULLTYPESELECT0 = 0x1
–
csi2_dy1:
•
CONTROL_PADCONF_CSI2_DX1[20] PULLTYPESELECT1 = 0x1
(i) The CSIPHY is initialized and ready/active in CSI2 mode.
6.5.2.2
Camera ISP CSIPHY Initialization for Work With CSI1/CCP2B Receiver
To fully initialize the CSIPHY, perform the following steps:
1. Configure all CSI1/CCP2B receiver registers to receive signals/data from the CSIPHY:
(a) Configure all CSI1/CCP2B registers:
(i) Set
[10:8] DATA2_POSITION.
CCP2 mode for work with CSIPHY1:
0x0: Not used/connected
CCP2 mode for work with CSIPHY2:
0x0: Not used/connected
(ii) Set
[6:4] DATA1_POSITION.
CCP2 mode for work with CSIPHY1:
0x1: Data lane 1 is at position 2.
0x2: Data lane 1 is at position 1.
CCP2 mode for work with CSIPHY2:
1246
Camera Image Signal Processor
SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated