1
2
3
4
5
P
1
.4
/S
M
C
L
K
/A
4
/V
R
E
F
+
/V
E
R
E
F
+
/T
C
K
6
P
1
.5
/T
A
0
.0
/S
C
L
K
/A
5
/T
M
S
7
P
1
.6
/T
A
0
.1
/S
D
O
/S
C
L
/T
D
I/
T
C
L
K
8
P
1
.7
/S
D
I/
S
D
A
/T
D
O
/T
D
I
9
RST/NMI/SBWTDIO
10
TEST/SBWTCK
11
XOUT/P2.7
12
XIN/P2.6/TA0.1
13
D
V
S
S
14
D
V
S
S
15
D
V
C
C
16
D
V
C
C
P1.0/TA0CLK/ACLK/A0
P1.1/TA0.0/A1
P1.2/TA0.1/A2
P1.3/ADC10CLK/A3/VREF-/VER EF-
1
DVCC
2
3
4
5
6
7
8
P1.6/TA0.1/A6/SDO/SCL/TDI/TCLK
9
P1.7/A7/SDI/SDA/TDO/TDI
10
RST/NMI/SBWTDIO
11
TEST/SBWTCK
12
XOUT/P2.7
13
XIN/P2.6/TA0.1
14
DVSS
P1.0/TA0CLK/ACLK/A0
P1.1/TA0.0/A1
P1.2/TA0.1/A2
P1.3/ADC10CLK/A3/VREF-/VEREF-
P1.4/SMCLK/A4/VREF+/VEREF+/TCK
P1.5/TA0.0/A5/SCLK/TMS
MSP430G2231-Q1
www.ti.com
SLAS787B – NOVEMBER 2011 – REVISED MARCH 2014
7 Terminal Configuration and Functions
7.1 14-Pin PW Package (Top View)
NOTE: See port schematics in
I/O Port Schematics
for detailed I/O information.
7.2 16-Pin RSA Package (Top View)
NOTE: See port schematics in
I/O Port Schematics
for detailed I/O information.
Copyright © 2011–2014, Texas Instruments Incorporated
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