Bus
Keeper
EN
P1.6/TA0.1/SDO/SCL/A6/TDI
To Module
From USI
PxOUT.y
DV
SS
DV
CC
1
1
0
PxIN.y
PxSEL.y or
USIP E6
PxREN.y
1
0
PxIRQ.y
PxIE.y
EN
Set
Q
Interrupt
Edge
Select
PxSEL.y
PxIES.y
PxIFG.y
Direction
0: Input
1: Output
PxDIR.y
USIPE6
1
0
From JTAG
To JTAG
INCHx
To ADC10
ADC10AE0.y
from USI
PxSEL.y
USI in I2C mode: Output driver drives low level only. Driver is disabled in JTAG mode.
MSP430G2231-Q1
www.ti.com
SLAS787B – NOVEMBER 2011 – REVISED MARCH 2014
10.5 Port P1 Pin Schematic: P1.6, Input/Output With Schmitt Trigger
Table 17. Port P1 (P1.6) Pin Functions
CONTROL BITS OR SIGNALS
PIN NAME (P1.x)
x
FUNCTION
ADC10AE.x
JTAG
P1DIR.x
P1SEL.x
USIP.x
(INCH.x = 1)
Mode
P1.6/
P1.x (I/O)
I: 0; O: 1
0
0
0
0
TA0.1/
TA0.1
1
1
0
0
0
TA0.CCR1B
0
1
0
0
0
6
A6/
A6
X
X
0
1 (y = 6)
0
SDO/
SDO
X
X
1
0
0
TDI/TCLK
TDI/TCLK
X
X
0
0
1
Copyright © 2011–2014, Texas Instruments Incorporated
Submit Documentation Feedback
37
Product Folder Links:
MSP430G2231-Q1