Hardware
2.2.3
Emulator Connection: Isolation Jumper Block
The isolation jumper block at jumper J101 connects or disconnects signals that cross from the eZ-FET
domain into the MSP430FR6989 target domain. This includes eZ-FET Spy-Bi-Wire signals, application
UART signals, and 3.3-V and 5-V power (see
and
Reasons to open these connections:
•
To remove any and all influence from the eZ-FET emulator for high accuracy target power
measurements
•
To control 3-V and 5-V power flow between the eZ-FET and target domains
•
To expose the target MCU pins for other use than onboard debugging and application UART
communication
•
To expose the programming and UART interface of the eZ-FET so that it can be used for devices other
than the onboard MCU.
Table 2. Isolation Block Connections
Jumper
Description
GND
Ground
5V
5-V VBUS from USB
3V3
3.3-V rail, derived from VBUS in the eZ-FET domain
Backchannel UART: Ready-To-Send, for hardware flow control. The target can use this to indicate whether it is
RTS >>
ready to receive data from the host PC. The arrows indicate the direction of the signal.
Backchannel UART: Clear-To-Send, for hardware flow control. The host PC (through the emulator) uses this to
CTS <<
indicate whether it is ready to receive data. The arrows indicate the direction of the signal.
Backchannel UART: The target FR6989 receives data through this signal. The arrows indicate the direction of the
RXD <<
signal.
Backchannel UART: The target FR6989 sends data through this signal. The arrows indicate the direction of the
TXD >>
signal.
SBW RST
Spy-Bi-Wire emulation: SBWTDIO data signal. This pin also functions as the RST signal (active low).
SBW TST
Spy-Bi-Wire emulation: SBWTCK clock signal. This pin also functions as the TST signal.
9
SLAU627A – May 2015 – Revised July 2015
MSP430FR6989 LaunchPad™ Development Kit (MSP
‑
EXP430FR6989)
Copyright © 2015, Texas Instruments Incorporated
