Workaround
None.
NOTE: This erratum applies to debug mode only.
CPU40
CPU Module
Category
Compiler-Fixed
Function
PC is corrupted when executing jump/conditional jump instruction that is followed by
instruction with PC as destination register or a data section
Description
If the value at the memory location immediately following a jump/conditional jump
instruction is 0X40h or 0X50h (where X = don't care), which could either be an instruction
opcode (for instructions like RRCM, RRAM, RLAM, RRUM) with PC as destination
register or a data section (const data in flash memory or data variable in
RAM), then the PC value is auto-incremented by 2 after the jump instruction is executed;
therefore, branching to a wrong address location in code and leading to wrong program
execution.
For example, a conditional jump instruction followed by data section (0140h).
@0x8012 Loop DEC.W R6
@0x8014 DEC.W R7
@0x8016 JNZ Loop
@0x8018 Value1 DW 0140h
Workaround
In assembly, insert a NOP between the jump/conditional jump instruction and program
code with instruction that contains PC as destination register or the data section.
Refer to the table below for compiler-specific fix implementation information.
IDE/Compiler
Version Number
Notes
IAR Embedded Workbench
IAR EW430 v5.51 or later
For the command line version add
the following information Compiler:
--hw_workaround=CPU40
Assembler:-v1
TI MSP430 Compiler Tools (Code
Composer Studio)
v4.0.x or later
User is required to add the compiler
or assembler flag option below. --
silicon_errata=CPU40
MSP430 GNU Compiler (MSP430-
GCC)
Not affected
CPU46
CPU Module
Category
Functional
Function
POPM peforms unexpected memory access and can cause VMAIFG to be set
Description
When the POPM assembly instruction is executed, the last Stack Pointer increment is
followed by an unintended read access to the memory. If this read access is performed
on vacant memory, the VMAIFG will be set and can trigger the corresponding interrupt
(SFRIE1.VMAIE) if it is enabled. This issue occurs if the POPM assembly instruction is
performed up to the top of the STACK.
Advisory Descriptions
10
MSP430F6723 Microcontroller
SLAZ340AF – OCTOBER 2012 – REVISED MAY 2021
Copyright © 2021 Texas Instruments Incorporated
