PRODUCTPREVIEW
MSP430F663x
SLAS566 – OCTOBER 2009
www.ti.com
DESCRIPTION
The Texas Instruments MSP430 family of ultralow-power microcontrollers consists of several devices featuring
different sets of peripherals targeted for various applications. The architecture, combined with five low power
modes is optimized to achieve extended battery life in portable measurement applications. The device features a
powerful 16-bit RISC CPU, 16-bit registers, and constant generators that contribute to maximum code efficiency.
The digitally controlled oscillator (DCO) allows wake-up from low-power modes to active mode in less than 5
μ
s.
The MSP430F663x series are microcontroller configurations with four 16-bit timers, a high performance 12-bit
analog-to-digital (A/D) converter, two universal serial communication interfaces (USCI), hardware multiplier,
DMA, real-time clock module with alarm capabilities, comparator, USB 2.0, and up to 74 I/O pins.
Typical applications for this device include analog and digital sensor systems, digital motor control, remote
controls, thermostats, digital timers, hand-held meters, etc.
Family members available are summarized in
Table 1
.
Table 1. Family Members
USCI
Flash
SRAM
Timer_A
Timer_B
ADC12_A
DAC12_A
Comp_B
Package
Channel A:
Channel B:
Device
I/O
(KB)
(KB)
(1)
(2)
(3)
(Ch)
(Ch)
(Ch)
Type
UART/IrDA/
SPI/I
2
C
SPI
12 ext /
100 PZ,
MSP430F6638
256
16 + 2
5, 3, 3
7
2
2
2
12
74
4 int
113 ZQW
12 ext /
100 PZ,
MSP430F6637
(4)
192
16 + 2
5, 3, 3
7
2
2
2
12
74
4 int
113 ZQW
12 ext /
100 PZ,
MSP430F6636
(4)
128
16 + 2
5, 3, 3
7
2
2
2
12
74
4 int
113 ZQW
12 ext /
100 PZ,
MSP430F6635
(4)
256
16 + 2
5, 3, 3
7
2
2
-
12
74
4 int
113 ZQW
12 ext /
100 PZ,
MSP430F6634
(4)
192
16 + 2
5, 3, 3
7
2
2
-
12
74
4 int
113 ZQW
12 ext /
100 PZ,
MSP430F6633
(4)
128
16 + 2
5, 3, 3
7
2
2
-
12
74
4 int
113 ZQW
100 PZ,
MSP430F6632
(4)
256
16 + 2
5, 3, 3
7
2
2
-
-
12
74
113 ZQW
100 PZ,
MSP430F6631
(4)
192
16 + 2
5, 3, 3
7
2
2
-
-
12
74
113 ZQW
100 PZ,
MSP430F6630
(4)
128
16 + 2
5, 3, 3
7
2
2
-
-
12
74
113 ZQW
(1)
The additional 2 KB USB SRAM that is listed can be used as general purpose SRAM when USB is not in use.
(2)
Each number in the sequence represents an instantiation of Timer_A with its associated number of capture compare registers and PWM
output generators available. For example, a number sequence of 3, 5 would represent two instantiations of Timer_A, the first
instantiation having 3 and the second instantiation having 5 capture compare registers and PWM output generators, respectively.
(3)
Each number in the sequence represents an instantiation of Timer_B with its associated number of capture compare registers and PWM
output generators available. For example, a number sequence of 3, 5 would represent two instantiations of Timer_B, the first
instantiation having 3 and the second instantiation having 5 capture compare registers and PWM output generators, respectively.
(4)
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