Frequently Asked Questions
A-9
the JTAG pins and the measurements will be erroneous. Refer to FAQ,
Debugging #12) and Hardware #11).
11) Most C-SPY settings (breakpoints, etc.) are now preserved between
sessions.
12) When C-SPY has control of the device, the CPU is ON (i.e., it is not
in low power mode) regardless of the settings of the low power mode
bits in the status register. Any low power mode conditions will be
restored prior to STEP or GO. Consequently, do not measure the
power consumed by the device while C-SPY has control of the device.
Instead, run your application using GO with JTAG released. Refer to
FAQ, Debugging #10) and Hardware #11).
13) The VIEW->MEMORY->MEMORY FILL dialog of C-SPY requires
hexadecimal values for Starting Address, Length, and Value to be
preceded with “0x”. Otherwise the values are interpreted as decimal.
14) The MEMORY utility of C-SPY can be used to view the RAM, the
INFORMATION memory, and the Flash MAIN memory. The MEMORY
utility of C-SPY can be used to modify the RAM; the INFORMATION
memory and Flash MAIN memory cannot be modified using the
MEMORY utility. The INFORMATION memory and Flash MAIN
memory can only be programmed when a project is opened and the
data is downloaded to the device, or when EMULATOR->INIT NEW
DEVICE is selected.
15) C-SPY does not permit the individual segments of the
INFORMATION memory and the Flash MAIN memory to be
manipulated separately; consider the INFORMATION memory to be
one contiguous memory, and the Flash MAIN memory to be a second
contiguous memory.
16) The MEMORY window correctly displays the contents of memory
where it is present. However, the MEMORY window incorrectly
displays the contents of memory where there is none present.
Memory should only be used in the address ranges as specified by the
device data sheet.
17) C-SPY utilizes the system clock to control the device during
debugging. Therefore, device counters, etc., that are clocked by the
Main System Clock (MCLK) will be effected when C-SPY has
control of the device. Special precautions are taken to minimize the
effect upon the Watchdog Timer. The CPU core registers are
preserved. All other clock sources (SMCLK, ACLK) and peripherals
continue to operate normally during emulation. In other words, the
Flash Emulation Tool is a partially intrusive tool.
Devices which support Clock Control (EMULATOR->ADVANCED-
>GENERAL CLOCK CONTROL) can further minimize these effects by
selecting to stop the clock(s) during debugging.
Refer to FAQ, Debugging #22).
18) There is a time after C-SPY performs a reset of the device (when
the C-SPY session is first started, when the Flash is reprogrammed
(via INITNEW DEVICE), when JTAG is resynchronized
Summary of Contents for MSP-FET430
Page 3: ......
Page 4: ...July 2004 U s e r s G u i d e ...
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Page 52: ...Hardware B 2 Figure B 1 MSP FET430X110 Schematic ...
Page 54: ...Hardware B 4 Figure B 3 MSP FET430IF FET Interface module Schematic ...
Page 63: ...Hardware B 13 Figure B 11 MSP TSPN80 Target Socket module Schematic ...
Page 67: ...Hardware B 17 Figure B 15 MSP FET430UIF USB Interface schematics ...
Page 68: ...Hardware B 18 ...
Page 69: ...Hardware B 19 ...
Page 70: ...Hardware B 20 ...
Page 71: ...Hardware B 21 ...
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Page 95: ...MSP FET430UIF Installation Guide F 5 Figure F 5 Device Manager ...