Power Supplies
5
SBAU140A – December 2008 – Revised February 2016
Copyright © 2008–2016, Texas Instruments Incorporated
MSOP-8EVM and MSOP-8EVM-PDK
Table 4. J3 Pinout
Pin Number
Signal
Pin Number
Signal
1
Unused
6
AGND
2
Unused
7
+1.8VD
3
+5VA
8
+VD1
4
Unused
9
+3.3VD
5
DGND
10
+5VD
When power is supplied to J3, JMP3 allows for one of four different dc voltages to be applied to the digital
sections of the ADC. Review the schematic (located at the end of this document) and PWB silkscreen
(see
) for further details.
4.1
ADC Power
The device installed on the modular MSOP-8EVM has several options with regard to its power source.
Refer to the schematic shown at the end of this document for details about the following information.
JMP1 and JMP3 allow the user to select the power supply used by the ADC. When JMP1 is in the default
factory position (shunt on pins 1-2), power to the ADC comes from J3.3 or TP5. Single gate digital buffers
(U3, U5, and U6) are installed on the ADC digital input/output lines to allow operation with low-voltage
controllers, such as the MSP430. The supply voltage to these buffers is determined by JMP3 or the
voltage applied to TP7.
