The
Bucks
section provides status information and enable controls for all the 4 buck cores. On the left of the
section are the check-boxes for the buck enable bits. The
Mode
field provides information on each of the buck
core and can have any of the values given in
Table 4-1. Mode Information
BUCK MODE
Disabled
Buck state machine in 'disable'
Enabled
Buck state machine in 'enable'
The
Multiphase status
info field tells whether a buck core is configured as a master or a slave. The "Current"
field gives the result of the buck converter load current measurement operation. Output currents of each buck
core and total output current of one or more of the masters are shown on the fields.
The
System Flags / Interrupts
section as well as the
Interrupt bits
and the
Status bits
sections give data on
system faults and warnings. If the interrupt is set for any reason the Interrupt active field shall show ‘1’ on red
background. The flag causing the interrupt will also be set on the Main tab. Interrupts on LP875761-Q1 can only
be cleared by writing '1’ to associated registers. Any individual flag can be cleared by clicking the
Clear
button
next to each flag field. Some of the flags also have a mask bits. If
Mask
check-box of certain flag is checked, the
interrupt is not generated. The
Status
bits will show the current status of the faults.
The
Power Good
section is for Power Good pin control and indication. It includes the latched values of buck
Power Good Faults. These can be cleared with the Clear -button.
At the bottom of the GUI window is the
Auto Write
checkbox. If
Auto Write
is checked (default) any checking, un-
checking or pulldown menu selections will immediately launch I
2
C writes to the chip register(s). If not checked,
the user can update the chip registers to correspond the configuration selected on the GUI by clicking
Write
Registers
.
If
Poll Status
is selected the software sends a query to the LP875761-Q1 at a fixed interval in order to detect the
status of the chip, including operation mode, multi-phase status, and output current. If also the
Poll Only Pins
is
selected the software is monitoring only the state of Interrupt and Powergood pins. If
Poll Status
is not selected
or if
Poll Only Pins
is selected, user can read the registers by applying
Read Registers
.
Bus Speed
pulldown
below and is instantly applied for System I
2
C.
Table 4-2. I
2
C-Compatible Bus Support
BUS SPEED SELECTION
EXPLANATION
Fast (400 kHz)
Fast I
2
C-compliant operation at 400 kHz
High-Speed (3.4 MHz)
HS I
2
C-compliant data transfer with master codes.
4.2 Other Tabs and Menus
The
Tools
pulldown menu hosts another way of accessing the LP875761-Q1 registers (see
). The
Direct Register Access
tool can be used to read or write any register (see
bits appear on the right side Field View (see
). When moving mouse over bits in Field View, bits are
highlighted in the register view. Bits can be controlled either from register view or field view. Register settings can
also be saved to a file or pre-made register file can be loaded in the Direct Register Access tool. Registers can
be updated immediately or manually (see
When using direct register access, TI recommends un-checking the poll status check-box. This way the GUI will
only do the reads and writes commanded from the direct access dialog.
GUI Overview
SNVU751 – OCTOBER 2020
The LP875761Q1EVM Evaluation Module
11
Copyright © 2020 Texas Instruments Incorporated