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SNVU532 – November 2016
Copyright © 2016, Texas Instruments Incorporated
LP592201EVM User Guide
User's Guide
SNVU532 – November 2016
LP592201EVM User Guide
The Texas Instruments LP592201EVM evaluation module (EVM) helps designers evaluate the operation
and performance of the adjustable LP592201 LDO voltage regulator. The LP592201EVM contains one
LP592201DSC LDO adjustable voltage regulator, programmed to have an output voltage of 1.8 V, in the
WSON (DSC) package (see
).
Table 1. Device Information
EVM ORDERABLE NUMBER
V
OUT
PART NAME
PACKAGE
LP592201EVM
1.8 V
LP592201DSC
10-pin / WSON / DSC
Contents
1
Setup
..........................................................................................................................
1.1
Input/Output Connector Descriptions
.............................................................................
1.2
Setup
.................................................................................................................
1.3
Operation
............................................................................................................
1.4
Options
...............................................................................................................
2
Changing the Output Voltage
..............................................................................................
3
Board Layout
.................................................................................................................
4
LP592201EVM Schematic
..................................................................................................
5
Bill of Materials
...............................................................................................................
List of Figures
1
EN Jumper Settings
.........................................................................................................
2
LP592201EVM Setup
.......................................................................................................
3
Top Assembly Layer and Silk-Screen
.....................................................................................
4
Top-Layer Routing
...........................................................................................................
5
Layer 2: GND Plane
.........................................................................................................
6
Layer 3: GND Plane
.........................................................................................................
7
Bottom-Layer Routing
.......................................................................................................
8
Bottom Assembly Layer and Silk-Screen
.................................................................................
List of Tables
1
Device Information
...........................................................................................................
2
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