Board Layout
5
SNVU532 – November 2016
Copyright © 2016, Texas Instruments Incorporated
LP592201EVM User Guide
3
Board Layout
through
show the board layout for the LP592201EVM PCB. The EVM offers resistors R1
and R2 to set the output voltage, resistor Rpg for pull-up of the PG pin, a C
FF
capacitor to enhance phase
margin, capacitors C1 and C2 to add additional capacitance to the input and output, and J3 3-pin terminal
to set the EN pin status.
The LP592201 dissipates power. The WSON DSC 6-pin package offers an exposed thermal pad to
enhance thermal performance. The exposed thermal pad must be soldered to the copper landing on the
PCB for optimal thermal performance. The PCB provides 1 oz. (0.0014 inch) copper planes on all four
layers, and four thermal vias under the exposed thermal pad, to enhance thermal performance.
Figure 3. Top Assembly Layer and Silk-Screen
Figure 4. Top-Layer Routing