100mV/div
875mA/div
100µs/div
VOUT
IOUT
100mV/div
875mA/div
100µs/div
VOUT
IOUT
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Efficiency and Line and Load Regulation
15
SNVU542 – July 2017
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Copyright © 2017, Texas Instruments Incorporated
LMS36x5x-Q1 EVM User's Guide
7.1
Load Transients
V
OUT
= 5 V
I
OUT
= 0 A to 3.5 A,
FPWM
T
R
= T
F
= 1 µs
Figure 16. LMS3655MQEVM Load Regulation
V
OUT
= 5 V
I
OUT
= 200 mA to 3.5 A,
AUTO
T
R
= T
F
= 1 µs
Figure 17. LMS3655MQEVM Load Transients
NOTE:
The output capacitance for all four variants is designed for stable operation across all load
transients and optimized performance with a maximum load transient of 0 to 3.5 A. For
applications which require superior load transient performance beyond this range, TI
recommends increasing the output capacitance. The best starting point for an optimized
design is the Texas Instruments
WEBENCH Design Tool
.
7.2
Conducted EMI
Figure 18. Conducted EMI Setup
