Configuring the EVM
4.5
Configuring the Clock Outputs
All eight clock output pairs of LMK03328 are routed via 50-ohm single-ended traces to SMA ports
(OUT[7:0]_P/_N) through AC coupling capacitors. These outputs have series resistor (0-
Ω
populated)
options. Each output pair supports AC-coupled Differential output levels with 400 mV (LVDS-like), 600 mV
(CML-like), and 800 mV (LVPECL-like) single-ended swing, HCSL output levels (programmable 50-
Ω
on-
chip termination), and 1.8-V LVCMOS output levels. Each channel divider output bank has its own VDDO
output supply pin that operates from 1.8 V to 3.3 V. The on-chip LDOs provide regulated power to the
output channel and provide excellent PSRR. The LVCMOS output is limited to an output high level of 1.8
V even with VDDO of 2.5 V or 3.3 V, since the LDOs step-down the output driver supply to 1.8 V
internally.
4.6
Configuring the Status Outputs
The STATUS0 and STATUS1 outputs of LMK03328 are configured as 3.3-V LVCMOS by default and are
routed via 50-ohm single-ended traces to SMA ports (STAT0 and STAT1) through AC coupling capacitors.
The status pins can also be connected to yellow LEDs (D6 and D7) through switch S3 (2 positions) to
enable or disable visual indication of the status output states. When the switch position is ON, the LED will
be lit when the STATUS output state is logic low.
4.7
Using the USB Interface Connection
The on-board MSP430F5529 USB microcontroller (U8) provides an I2C host interface to the LMK03328
slave device. The device registers can be controlled via USB using the GUI platform running on a Host
PC.
17
SNAU184 – August 2015
LMK03328EVM User’s Guide
Copyright © 2015, Texas Instruments Incorporated
