background image

1

1

2

2

3

3

4

4

5

5

6

6

D

D

C

C

B

B

A

A

1

2

LM10524EVM REVA

10/15/2013

SV600841 pg1.SchDoc

Sheet Title:

Size:

Mod. Date:

File:

Sheet:

of

B

http://www.ti.com

Contact:

h ttp://www.ti.com/support/

LM10524EVM

Project Title:

Designed for:

Public Release

Assembly Variant:

Variant name not interpreted

© Texas Instruments

2013

Drawn By:
Engineer:

Robert Te trault

Texas Instruments and/or its licensors do not warrant the accuracy or completeness of this specification or any information contained therein. Texas Instruments and/or its licensors do not
warrant that this design will meet the specifications, will be suitable for your application or fit for any particular purpose, or will operate in an implementation. Texas Instruments and/or its
licensors do not warrant that the design is production worthy. You should completely validate and test your design implementation to confirm the system functionality for your application.

Not in version control

SVN Rev:

SV600841

Number:

Rev:

B

BUCK1

FB_B1

SW_B1

VIN_B1

GND_BUCK

BUCK2

FB_B2

VIN_B2

BUCK3

FB_B3

VIN_B3

GND_BUCK

GND_BUCK

SW_B3

1µH

L3

GND_BUCK

0

SB3

VIN_B1

VIN_B2

VIN_B3

VIN

VIN

PWR_OK

VCOMP

SPI_CS
SPI_DI

SPI_DO

SPI_CLK

DEVSLP

PWRUP_MODE

IRQ

VIN_IO

V

B

A

T

T

DEVSLP_OVR1

BUCK1

BUCK2

BUCK3

BATTERY CONNECTOR

4

1

2

3

J2

1

TP27

2

1

3

JP2

SPI_CS_USB

SPI_DI_USB

SPI_DO_USB

SPI_CLK_USB

DEVSLP_USB

PWRUP_MODE_USB

IRQ_USB

DEVSLP_OVR1_USB

DEVSLP_OVR2_USB

VIN_B1

VIN_B2

VIN_B3

BUCK1

BUCK2

BUCK3

VIN

PWR_OK

VBATT

VIN_IO

DEVSLP

DC IN

DEVSLP

1

2

3

Q2

VBATT

SLEEP_EN

DEVSLP_CTRL

SPI_CSx
SPI_DIx
SPI_DOx
SPI_CLKx
DEVSLPx
PWRUP_MODEx

DEVSLP_OVR1x

DEVSLP_CTRL

IRQx

SLEEP_EN

47µF

C4

47µF

C7

47µF

C9

1

2

3

Q3

ALLOW_SLEEP_USB

VIN_IO

200k

R4

DEVSLP

IRQx

1
2
3

J3

1
2
3

J4

1
2
3

J5

1
2
3

J6

1
2
3

J7

1
2
3

J8

1
2
3

J15

1
2
3

J14

1
2
3

J11

1
2
3

J12

1

2

J13

Green

LD1

Red

LD2

510

R1

510

R3

4.7µF

C3

4.7µF

C6

4.7µF

C8

10µF

C10

2.2µF

C5

VIN_IO

A1

PWR_OK

A2

VIN

A3

DEVSLP

A4

VIN_B1

A5

SW_B1

A6

GND_B1

A7

GND

B1

GND

B2

VCOMP

B3

FB_B1

B4

VIN_B1

B5

SW_B1

B6

GND_B1

B7

SPI_CLK

C1

GND

C2

IRQ

C3

FB_B1

C4

FB_B1

C5

NC

C6

DEVSLP_OVR1

C7

SPI_DI

D1

DEVSLP_OVR2

D7

SPI_DO

E1

DEVSLP_CTRL

E7

SPI_CS

F1

SW_B2

F2

FB_B2

F3

NC

F4

FB_B3

F5

SW_B3

F6

SLEEP_EN

F7

GND_B2

G1

SW_B2

G2

VIN_B2

G3

NC

G4

VIN_B3

G5

SW_B3

G6

GND_B3

G7

GND_B2

H1

SW_B2

H2

VIN_B2

H3

POWERUP_MODE

H4

VIN_B3

H5

SW_B3

H6

GND_B3

H7

U1

LM10524TME

DEVSLP_OVR2x

DEVSLP_OVR2

SW_B2

2.2µF

C1

VCC3.8

5

4

1
2
3

6
7
8
9
10
11

J1
TSW-111 -07-G-S

2.2µH

L1

2.2µH

L2

0

SB4

0

SB2

0

SB1

0

SB5

0

SB6

SH-J2

SH-J3

SH-J4

SH-J5

SH-J6

SH-J7

SH-J8

SH-J9

SH-J10

SH-J13

2

1

3

JP3

2

1

3

JP4

2

1

3

JP5

2

1

3

JP6

2

1

3

JP7

2

1

3

JP8

2

1

3

JP9

2

1

3

JP10

2

1

3

JP13

Assembly Note

ZZ5

Jumpers SH-J2 to SH-J10 and SH-J13 installed on matching JP# pins 2 and 3

ALLOW_SLEEP_EXT

Schematics

www.ti.com

7

Schematics

Figure 5. LM10524EVM Schematic

10

LM10524EVM User Guide

SNVU314 – January 2014

Submit Documentation Feedback

Copyright © 2014, Texas Instruments Incorporated

Summary of Contents for LM10524EVM

Page 1: ...LM10524EVM User Guide User s Guide Literature Number SNVU314 January 2014 ...

Page 2: ...vice is ideal for supporting ASIC and SOC designs for SSD and Flash drives Topic Page 1 Evaluation Kit Overview 3 2 Evaluation Software 4 3 Hardware Set Up 4 4 Using the Evaluation Software 4 5 Menus 7 6 Using the Evaluation Hardware 7 7 Schematics 10 8 PCB Layers 12 2 LM10524EVM User Guide SNVU314 January 2014 Submit Documentation Feedback Copyright 2014 Texas Instruments Incorporated ...

Page 3: ...perates through the USB port The Evaluation Kit consists of LM10524EVM Board USB Interface Cable Evaluation Kit Document this document Figure 1 LM10524EVM Board 3 SNVU314 January 2014 LM10524EVM User Guide Submit Documentation Feedback Copyright 2014 Texas Instruments Incorporated ...

Page 4: ...hange in the probes check the Poll Status box at bottom left 3 Hardware Set Up Please use ESD protection when handling the evaluation boards to prevent any damage due to ESD events Connect the LM10524 Evaluation board to the USB port of a PC using the USB cable When the USB board is plugged in for the first time the operating system prompts for New hardware found and installs the USB driver If thi...

Page 5: ...the LM10524 is in devsleep mode A red LED LD2 DEVSLP is lit All the device functions can be accessed via the control buttons 4 2 Main Screen Figure 2 Figure 3 The right and lower part of screen is visible as the background for both tab screens Common functions can be controlled here 4 3 Right Part of Screen The Probe frame contains the results of the voltage measurements Values can be read when th...

Page 6: ...te read operation Register information is given in the format R WXX YY where first letter indicates operation Read or Write XX is the register address and YY is data Figure 3 Log Tab 4 5 System Settings Tab Figure 2 Selecting this tab allows access to the controls of Buck1 Buck2 and Buck3 regulators comparator Disable and PWR_OK pin polarity It also shows a log of occurred events In System status ...

Page 7: ...the device by pressing the Read button Next to each bit is a description 6 Using the Evaluation Hardware Connectors are provided to allow a battery connection and output voltage measurement Jumpers allow selectable or USB controlled settings for device functions 6 1 Power Supply The evaluation board may be powered from a battery connector or from the USB interface Set jumper between J2 pin2 and TP...

Page 8: ...O 2 SPI_CS 3 SPI_DI 4 SPI_DO 5 SPI_CLK 6 DEVSLP 7 PWRUP 8 INTERRUPT 9 DEVSLP_OVR1 10 DEVSLP_OVR2 11 GND For accessing the signals externally via this connector jumpers from JP2 to JP10 should be set to EXT position Table 3 CONNECTOR J3 Pins Pin Function 1 VIN_B1 2 VIN_B1 sense 3 GND Table 4 CONNECTOR J4 Pins Pin Function 1 BUCK1 2 BUCK1 sense 3 GND Table 5 CONNECTOR J Pins Pin Function 1 VIN_B2 2 ...

Page 9: ...ction 1 VIN 2 VIN_sense 3 GND Table 10 CONNECTOR J12 Pins Pin Function 1 Power_OK 2 3 GND Table 11 CONNECTOR J13 Pins Pin Function 1 VCOMP 2 GND Table 12 CONNECTOR J14 Pins Pin Function 1 SLEEP_EN 2 IRQx 3 DEVSLP_CTRLx Table 13 CONNECTOR J15 Pins Pin Function 1 VIN_IO 2 ALLOW_SLEEP_EXT 3 GND 9 SNVU314 January 2014 LM10524EVM User Guide Submit Documentation Feedback Copyright 2014 Texas Instruments...

Page 10: ...EVSLP_OVR1_USB DEVSLP_OVR2_USB VIN_B1 VIN_B2 VIN_B3 BUCK1 BUCK2 BUCK3 VIN PWR_OK VBATT VIN_IO DEVSLP DC IN DEVSLP 1 2 3 Q2 VBATT SLEEP_EN DEVSLP_CTRL SPI_CSx SPI_DIx SPI_DOx SPI_CLKx DEVSLPx PWRUP_MODEx DEVSLP_OVR1x DEVSLP_CTRL IRQx SLEEP_EN 47µF C4 47µF C7 47µF C9 1 2 3 Q3 ALLOW_SLEEP_USB VIN_IO 200k R4 DEVSLP IRQx 1 2 3 J3 1 2 3 J4 1 2 3 J5 1 2 3 J6 1 2 3 J7 1 2 3 J8 1 2 3 J15 1 2 3 J14 1 2 3 J1...

Page 11: ...USB DEVSLP_OVR2_USB BUCK3 B2_S B3_S B1_S VBATT_S VIN_IO ALLOW_SLEEP_USB TP36 VCC3 3_D 1 2 3 J10 200k R55 100k R56 1 50k R34 10 0k R17 18 2k R18 10 0k R15 10 0k R14 10 0k R20 10 0k R62 10µF C59 10µF C60 4 7µF C49 4 7µF C45 0 1µF C50 0 1µF C46 VCC3 8 10 0k R19 10 0k R16 10 0k R13 10 0k R21 P0 1 1 P0 0 2 GND 3 D 4 D 5 VDD 6 REGIN 7 VBUS 8 RST_C2CK 9 P3 0_C2D 10 P2 7 11 P2 6 12 P2 5 13 P2 4 14 P2 3 15...

Page 12: ...PCB Layers www ti com 8 PCB Layers Figure 7 Top Layer 12 LM10524EVM User Guide SNVU314 January 2014 Submit Documentation Feedback Copyright 2014 Texas Instruments Incorporated ...

Page 13: ...www ti com PCB Layers Figure 8 Middle Layer 13 SNVU314 January 2014 LM10524EVM User Guide Submit Documentation Feedback Copyright 2014 Texas Instruments Incorporated ...

Page 14: ...PCB Layers www ti com Figure 9 Middle Layer 14 LM10524EVM User Guide SNVU314 January 2014 Submit Documentation Feedback Copyright 2014 Texas Instruments Incorporated ...

Page 15: ...www ti com PCB Layers Figure 10 Bottom Layer 15 SNVU314 January 2014 LM10524EVM User Guide Submit Documentation Feedback Copyright 2014 Texas Instruments Incorporated ...

Page 16: ...ring the warranty period to the address designated by TI and that are determined by TI not to conform to such warranty If TI elects to repair or replace such EVM TI shall have a reasonable time to repair such EVM or provide replacements Repaired EVMs shall be warranted for the remainder of the original warranty period Replaced EVMs shall be warranted for a new full ninety 90 day warranty period 3 ...

Page 17: ... by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated Antenna types not included in this list having a gain greater than the maximum gain indicated for that type are strictly prohibited for use with this device Concernant les EVMs avec antennes détachables Conformément à la rég...

Page 18: ... connecting any load to the EVM output If there is uncertainty as to the load specification please contact a TI field representative During normal operation even with the inputs and outputs kept within the specified allowable ranges some circuit components may have elevated case temperatures These components include but are not limited to linear regulators switching transistors pass transistors cu...

Page 19: ...F REMOVAL OR REINSTALLATION ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES RETESTING OUTSIDE COMPUTER TIME LABOR COSTS LOSS OF GOODWILL LOSS OF PROFITS LOSS OF SAVINGS LOSS OF USE LOSS OF DATA OR BUSINESS INTERRUPTION NO CLAIM SUIT OR ACTION SHALL BE BROUGHT AGAINST TI MORE THAN ONE YEAR AFTER THE RELATED CAUSE OF ACTION HAS OCCURRED 8 2 Specific Limitations IN NO EVENT SHALL T...

Page 20: ...esponsible for compliance with all legal regulatory and safety related requirements concerning its products and any use of TI components in its applications notwithstanding any applications related information or support that may be provided by TI Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failur...

Reviews: