TP11
TP21
TP31
VS1
VS1
VS1
GND1
GND1
GND1
VS1
GND1
10.0k
R11
REF1
0.1
µ
F
C21
0.1
µ
F
C91
0.1
µ
F
C31
REF1
GND1
0
R51
0
R61
0.1
µ
F
C41
0
R71
GND1
10.0k
R21
0.1
µ
F
C51
GND1
NC
1
NC
2
IN+
3
IN-
4
NC
5
VS
6
ENABLE
7
REF
8
GND
9
OUT
10
U11
INA190A1RSW
GND1
0.1
µ
F
C11
GND1
0.002
R81
1
2
3
J41
M20-8770342
GND1
VS1
TP13
TP23
TP33
VS3
VS3
VS3
GND3
GND3
GND3
VS3
GND3
10.0k
R13
REF3
0.1
µ
F
C23
0.1
µ
F
C93
0.1
µ
F
C33
REF3
GND3
0
R53
0
R63
0.1
µ
F
C43
0
R73
GND3
10.0k
R23
0.1
µ
F
C53
GND3
NC
1
NC
2
IN+
3
IN-
4
NC
5
VS
6
ENABLE
7
REF
8
GND
9
OUT
10
U13
INA190A3RSW
GND3
0.1
µ
F
C13
GND3
0.002
R83
1
2
3
J43
M20-8770342
GND3
VS3
J03
IN+
J13
IN-
J01
IN+
J11
IN-
GND1
1
2
3
J31
1
2
3
J33
GND3
4
3
2
1
5
V+
V-
U23
TLV6001IDBVR
4
3
2
1
5
V+
V-
U21
TLV6001IDBVR
0
R33
0
R31
TP43
TP41
TP51
TP53
TP63
TP61
TP81
TP83
INA190EVM Schematic and PCB Layout
8
SBOU201A – April 2018 – Revised September 2018
Copyright © 2018, Texas Instruments Incorporated
INA190EVM User's Guide
7
INA190EVM Schematic and PCB Layout
NOTE:
Board layouts are not to scale. These figures are intended to show how the board is laid out; they are not intended to be used for
manufacturing INA190EVM PCBs.
7.1
Schematic
through
show the schematics for the INA190EVM PCB.
Figure 1. INA190EVM Schematic - Gain A1 and A3 Panels