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SNLU233 – October 2017
Copyright © 2017, Texas Instruments Incorporated
LVDS83BTSSOPEVM User’s Guide
Contents
1
Introduction
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2
LVDS83BTSSOPEVM Configuration
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2.1
LVDS83BTSSOPEVM Kit Contents
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2.2
Description of EVM Board
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2.3
Power-Up Sequence
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2.4
Signal Connectivity
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3
PCB Construction
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3.1
LVDS83BTSSOPEVM Board Layout
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4
LVDS83BTSSOPEVM Bill of Materials
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5
LVDS83BTSSOPEVM Schematics
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List of Figures
1
LVDS83BTSSOPEVM
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2
Clock Rising Edge (High) Jumper Setting
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3
Clock Falling Edge (Low) Jumper Setting
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4
Active Shutdown/Clear Jumper Setting
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5
24-Bit Color Host to 24-Bit LCD Panel Application With 2 MSB Transfer Over Fourth Data Channel
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6
24-Bit Color Host to 24-Bit LCD Panel Application With 2 LBS Transfer Over Fourth Data Channel
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7
18-Bit Color Host to 18-Bit LCD Panel Application
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8
12-Bit Color Host to 18-Bit LCD Panel Application
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9
24-Bit Color Host to 18-Bit LCD Panel Application
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10
LVDS83BTSSOPEVM Top Layer
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11
LVDS83BTSSOPEVM Layer 2 – GND
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12
LVDS83BTSSOPEVM Layer 3 – DUT GND
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13
LVDS83BTSSOPEVM Layer 4 – V
CC
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14
LVDS83BTSSOPEVM Layer 5 – GND
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15
LVDS83BTSSOPEVM Bottom Layer
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16
LVDS83BTSSOPEVM Schematics (1/3)
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17
LVDS83BTSSOPEVM Schematics (2/3)
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18
LVDS83BTSSOPEVM Schematic (3/3)
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List of Tables
1
BOM
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