Copyright © 2016, Texas Instruments Incorporated
SW14
OE#
3.3 V 1.2 V
EVMK2G SOC
DSS_DE
DSS_PCLK
DSS_DATA [0:23]
32 bit
Buffer
S74LVC32244ZKER
DSS_HSYNC
LCD Conn
40 pin FPC
Connector
DSS_VSYNC
32 bit
Buffer
S74LVC32244ZKER
SW13
K2G SoC
OE#
ESD
TPD12S016
I2C1_SDA
I2C1_SCL
HDMI
Audio
Selection
HDMI
Transmitter
SiI9022A
12.288MHz OSC
HDMI Connector
Std Type A
H
D
MI
_
C
E
H
D
MI
_
H
P
H
D
MI
_
I2
C
T
MD
S
_
C
L
T
MD
S
_
T
X
H
D
MI
_
C
E
H
D
MI
_
H
PL
G
H
D
MI
_
I2
C
T
MD
S
_
C
L
T
MD
S
_
T
X
MCASP2_ACLKX
MCASP2_AFSX
MCASP2_AXR
MCASP0_ACLKX
MCASP0_AFSX
MCASP0_AXR
LCD_AC_BIAS_EN
LCD_PCLK
LCDDATA [0:23]
LCD_HSYNC
LCD_VSYNC
HDMI_AC_BIAS_EN
HDMI DATA
HDMI HSYNC
HDMI_VSYNC
HDMI_PCLK
System Description
32
SPRUI65A – April 2016 – Revised January 2018
Copyright © 2016–2018, Texas Instruments Incorporated
K2G General Purpose Evaluation Module (EVMK2G)
Figure 21. Display Interface Block Diagram
Table 7. DSS Lines Between LCD and HDMI Multiplexing
SW13 and SW14 Position
Signal
Result
ON
SEL_HDMIn signal is low
HDMI is enabled
OFF
SEL_LCDn signal becomes low
LCD is enabled