Texas Instruments DP83561EVM, User Manual, Page: 26 / 60

8.4 Analog Front End and MAC Interface Schematic
C108
RJ45_ERTH GND RJ45_ERTH GND
These resistors to be placed close to
RJ45 to avoid stubs.
TD_A_RJ_P
0
R119
0
R120
DNP
TD_A_P TD_A_x_P
TD_A_cap_P
TD_A_RJ_N 0
R122
0
R124
DNP
TD_A_N TD_A_x_N
TD_A_cap_N
TD_B_RJ_P 0
R127
0
R129
DNP
TD_B_P TD_B_x_P
TD_B_cap_P
TD_B_RJ_N
0
R131
0
R133
DNP
TD_B_N TD_B_x_N
TD_B_cap_N
TD_C_RJ_P 0
R137
0
R138
DNP
TD_C_P TD_C_x_P
TD_C_cap_P
TD_C_RJ_N 0
R139
0
R140
DNP
TD_C_N TD_C_x_N
TD_C_cap_N
TD_D_RJ_P
0
R141
0
R142
DNP
TD_D_P TD_D_x_P
TD_D_cap_P
TD_D_RJ_N 0
R143
0
R144
DNP
TD_D_N TD_D_x_N
TD_D_cap_N
TPD4E05U06DQAR
D1+
1
D1-
2
NC
6
NC
7
NC
9
NC
10
D2+
4
D2-
5
GND
3
GND
8
U11
DNP
GND
GND
TD_A_x_N
TD_A_x_P
TD_B_x_N
TD_B_x_P
These capacitors to be placed close to RJ45 to avoid stubs.
These resistors to be placed close to chip to avoid stubs.
TD_A_x_P
TD_A_x_N
TD_B_x_P
TD_B_x_N
TD_C_x_P
TD_C_x_N
TD_D_x_P
TD_D_x_N
GND
GND GND
GND
MDC_CS
MDIO_CS
RXD3_CS
RXD2_CS
RXD1_CS
RXD0_CS
RXCLK_CS
RXCTRL_CS
TXCLK_CS
TXD3_CS
TXD2_CS
TXD1_CS
TXD0_CS
TX_CTRL_CS
RESETN_CS
0
R34
RESET_N
0
R31
TX_CTRL
0
R29
0
R27
0
R25
0
R23
0
R20
0
R19
0
R18
0
R17
0
R15
0
R14
0
R12
0
R11
TX_D0
TX_D1
TX_D3
GTX_CLK
RX_CTRL
RX_CLK
RX_D0
RX_D2
RX_D3
0
R16
RX_D1
MDC
MDIO
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
51 52
53 54
55 56
57 58
59 60
MP1
MP1
MP2
MP2
MP3
MP3
MP4
MP4
J4
ERM8-030-01-L-D-EM2-TR
RX_ER COL 1
2
J5
TSW-102-07-G-S
GND GND
0
R13
RX_ER_CS RX_ER
0
R33
0
R32
COL
CRS
COL_CS
CRS_CS
GND
MAC Interface - RGMII/MII
MDI Copper Interf ace
2
1
3 22
24
23
4
5
6
21
20
19
7
8
9
18
16
17
10
11
12 13
14
15
T1
1000B-5001X
10nF
50V
C54
TD_C_x_P
TD_B_x_N
TD_B_x_P
GND
0
R126
0
R113
0
R115
TD_B_RJ_N
0
R118
0
R125
TD_D_RJ_N
0
R112
0
R116
0
R121
TD_A_RJ_P
0
R128
75.0
R107
0.01µF
C82
RJ45_ERTH
4700pF
2kV
C109
1
2
J6
TSW-102-07-G-S
1.00M
R145
1.00M
R146
TD_D_x_N
TD_D_x_P
TD_C_x_N
TD_C_x_P
TPD4E05U06DQAR
D1+
1
D1-
2
NC
6
NC
7
NC
9
NC
10
D2+
4
D2-
5
GND
3
GND
8
U12
DNP
TD_D_x_N
TD_D_x_P
TD_C_x_N
TD_D_mag_N
TD_D_mag_P
TD_C_mag_N
TD_C_mag_P
TD_B_mag_N
TD_B_mag_P
TD_A_mag_N
TD_A_mag_P TD_A_x_P
TD_A_x_N TD_A_RJ_N
TD_B_RJ_P
TD_C_RJ_P
TD_C_RJ_N
TD_D_RJ_P
TX_D2
10nF
50V
C69
10nF
50V
C72
10nF
50V
C79
75.0
R114
75.0
R117
75.0
R123
TP10
TP_H0.45P0.75
TP1
TP_H0.45P0.75
TP2
TP_H0.45P0.75
TP3
TP_H0.45P0.75
TP4
TP_H0.45P0.75
TP5
TP_H0.45P0.75
TP6
TP_H0.45P0.75
TP7
TP_H0.45P0.75
TP8
TP_H0.45P0.75
TP9
TP_H0.45P0.75
2
3
4
1
5
6
7
8
9
10
11
12
J27
1-406541-1
TD_D_RJ_P
TD_D_RJ_N
TD_C_RJ_N
TD_C_RJ_P
TD_B_RJ_N
TD_B_RJ_P
TD_A_RJ_N
TD_A_RJ_P
RJ45_ERTH
Note: RJ45 connections made in Mirror Mode.
Channel Swap:
A->D
B->C
C->B
D->A
Polarity Swap:
TD_*_RJ_P -> TD_*_RJ__N
16V
33nF
C95
DNP
16V
33nF
C97
DNP
16V
33nF
C99
DNP
16V
33nF
C101
DNP
16V
33nF
C103
DNP
16V
33nF
C104
DNP
16V
33nF
C106
DNP
16V
33nF
C107
DNP
Figure 8-4. DP83561EVM AFE and MAC Interface
Schematics www.ti.com
26 DP83561EVM User’s Guide SLVUC11 – APRIL 2021
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