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1.2.2 Configuration Controls
Basic Connection and Operation
Table 1-1. CN057: 3.3-V Power Source Selection
CN057
DESCRIPTION
OFF
3.3 V must be supplied on CN056.
ON
3.3 V must be supplied by on board regulator, U051 (default).
Table 1-2. SW001: SPDIF Input Selection
SW001
DESCRIPTION
COAX
Select coaxial connector as SPDIF input (default)
OPT
Select optical connector as SPDIF input
Table 1-3. SW051: SPDIF Output Selection
SW051
DESCRIPTION
COAX
Select coaxial connector as SPDIF output
OPT
Select optical connector as SPDIF output (default)
Table 1-4. SW052: SPDIF Output Source Signal Selection
SW052
DESCRIPTION
REC
Select DOUTS of PCM3052A, DAC input
DIT
Select DIT4096 output, ADC output (default)
Table 1-5. SW004: DIR1703 Clock Source Selection
SW004
DESCRIPTION
X’tal
SCKO (system clock out) is generated from crystal clock.
PLL
SCKO is generated from SPDIF recovery clock.
AUTO
Source clock of SCKO is automatically selected according to PLL lock state (default).
Table 1-6. SW003: DIR1703 System Clock Selection
SW003
DESCRIPTION
SCF1
SCF0
OFF (L)
OFF (L)
128 f
S
OFF (L)
ON (H)
256 f
S
(Default)
ON (H)
OFF (L)
384 f
S
ON (H)
ON (H)
512 f
S
Table 1-7. SW005: DIT4096 Master Clock Selection
SW005
DESCRIPTION
CLK1
CLK0
OFF (H)
OFF (H)
512 f
S
OFF (H)
ON (L)
384 f
S
ON (L)
OFF (H)
256 f
S
(default)
ON (L)
ON (L)
Unused
Description
8
SLEU079 – September 2006
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