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10

9

8

7

6

5

4

3

2

1

U001

74HCU04

U002

DIR1703

C001
0.1uF

C008

10uF

/16V

C009
0.1uF

C004

0.1uF

SW001
FT1D-2M

Vcc

GND

1

2

3

4

5

6

7

14

13

12

11

10

9

8

R001

47k

R002

2.2k

C007
18pF

C006
18pF

X001

24.576MHz

R005

1M

C010
10uF
/16V

C011
0.1uF

R006
1.2k

C013
8200pF

C012

0.068uF

R003

47k

R004
470

D001

1SS133

SW002

FP1F-2M

C005
10uF
/16V

CN001
FFC-10AMEP1

SW004
FT1E-2M

[BRATE0]

[ADFLG]

[BRATE1]

SW003
DSS104

4

3

2

1

C003
10uF
/16V

2

1

3

GND

IN

OUT

C002
0.1uF

U003 REG1117-3.3

[BRSEL]

[URBIT]

[EMFLG]

[CSBIT]

[BFRAME]

1

2

3

4

5

6

7

8

9

10

11

12

13

14

ADFLG

BRATE0

BRATE1

SCKO

V

DD

DGND

XTO

XTI

CKTRNS

LRCKO

BCKO

DOUT

SCF0

SCF1

28

27

26

25

24

23

22

21

20

19

18

17

16

15

CKSEL

UNLOCK

FMT1

FMT0

V

CC

AGND

FILT

RST

DIN

BRSEL

BFRAME

EMFLG

URBIT

CSBIT

D

IR

1

7

0

3

1

2

3

4

5

6

7

8

9

10

11

12

13

14

CSS

COPY/C

L

CLK1

CLK0

MCLK

V

DD

DGND

FMT0

FMT1

SCLK

SYNC

SDATA

M/S

28

27

26

25

24

23

22

21

20

19

18

17

16

15

MODE

U

V

BLS

BLSM

EMPH

AUDIO

MONO

MDAT

V

DD

TX+

TX-

DGND

RST

D

IT

4

0

9

6

[BCK]

[TX-DATA]

[SCLK]

[LRCK]
[RX-DATA]

[BCK]

[

TX-DATA

]

[LRCK]

[BCK]

[SCLK]

[LRCK]

[RX-DATA]

[SCLK]

1

2

3

4

5

6

7

8

C015
10uF/16V

C014
0.1uF

1

2

3

4

5

6

7

8

9

10

Vcc

GND

20

19

18

17

16

15

14

13

12

11

U005
74HCT244

FMT1

FMT0

CLK1

CLK0

C017
10uF/16V

C016
0.1uF

C018

0.1uF

DIT-out

OPT-in

COAX in

V

CC

MDI

RESET

SCLK

RX-DATA

MDO

GND

MC
ML

LRCLK

TX-DATA

BCLK

V

CC

CSS

COPY/C

U

V

L

AUDIO

EMPH

BLSM

BLS

CN002
FFC

-9AMEP1

U004

DIT4096

SW006
DSS110

SW005
DSS108

RA001
47k x 5

RA003
47k x 9

RA002
47k x 3

REC-out

C019

10uF

/16V

C020
10uF

/16V

X’tal

Auto

Clock mode select

PLL

CN003
XB-3-7-20

CN004

XB-3-7-20

GND

C021
0.1uF

FMT1

FMT0

SCF1

SCF0

COAX

OPT

JP001
FFC
-10BMEP1

BRATE0

ADFLG

BRATE1

CKTRNS

URBIT

EMFLG

CSBIT

GND

UNLOCK/PE

JP002
FFC
-3AMEP1

BFRAME

DEM-DAI3052A Schematics

Figure 2-2. DEM-DAI3052A Digital Section (Digital Audio Interface)

SLEU079 – September 2006

Schematics and Printed Circuit Boards

21

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Summary of Contents for DEM-DAI3052A

Page 1: ...DEM DAI3052A User s Guide September 2006 DAP SLEU079 ...

Page 2: ...DEM DAI3052A User s Guide Literature Number SLEU079 September 2006 ...

Page 3: ...Configuration Controls 8 1 2 3 DEM DAI3052A EVM Operation 11 1 3 Typical Performance and Measurement Example 12 2 Schematics and Printed Circuit Boards 19 2 1 DEM DAI3052A Schematics 20 2 2 DEM DAI3052A Bill of Materials BOM 24 2 3 DEM DAI3052A Printed Circuit Boards 27 SLEU079 September 2006 Contents 3 Submit Documentation Feedback ...

Page 4: ...Clock Source Selection 8 1 6 SW003 DIR1703 System Clock Selection 8 1 7 SW005 DIT4096 Master Clock Selection 8 1 8 JP001 DIR1703 Crystal Selection for Crystal Mode System Clock and Default Sampling Frequency 9 1 9 SW003 DIR1703 Format Selection 9 1 10 SW005 DIT4096 Format Selection 9 1 11 SW006 DIT4096 Channel Status Information Control 9 1 12 SW053 Mode Control 9 1 13 JP051 DOUTS or MDO Setting f...

Page 5: ... and 4 dB amplifier with LPF for DAC switches or jumpers for mode or clock control and interface connector with PC for serial mode control The DEM DAI3052A operates under 5 V and 15 V analog power supplies with 1 Vrms or 2 Vrms unbalanced analog signal input and 2 Vrms unbalanced analog signal output Topic Page 1 1 Block Diagram 6 1 2 Basic Connection and Operation 7 1 3 Typical Performance and Me...

Page 6: ... LPF LPF R ch LPF JP107 JP105 JP106 DIT4096 SW005 System Clock Data Format SW006 74HCT244 OPT IN COAX IN S PDIF Input SW001 SW051 1 2 Vrms S PDIF Output R ch OPT OUT COAX OUT DAC Output ADC Input MIC Input Channel Status L ch 10 20 mVrms L ch Block Diagram Figure 1 1 DEM DAI3052A Block Diagram Description 6 SLEU079 September 2006 Submit Documentation Feedback ...

Page 7: ... source from the analog to digital converter ADC output or the digital to analog converter DAC input using SW052 Select the system clock source from x tal or SPDIF input recover clock using SW004 select the system clock using SW003 SCF1 0 for DIR1703 and using SW005 CLK1 0 for DIT4096 and select the system clock frequency for x tal mode using JP001 setting Set the interface format 24 bit I2 S usin...

Page 8: ...put Source Signal Selection SW052 DESCRIPTION REC Select DOUTS of PCM3052A DAC input DIT Select DIT4096 output ADC output default Table 1 5 SW004 DIR1703 Clock Source Selection SW004 DESCRIPTION X tal SCKO system clock out is generated from crystal clock PLL SCKO is generated from SPDIF recovery clock AUTO Source clock of SCKO is automatically selected according to PLL lock state default Table 1 6...

Page 9: ...ction SW005 DESCRIPTION FMT1 FMT0 OFF H OFF H 16 bit right justified OFF H ON L 24 bit right justified ON L OFF H 24 bit I2S default ON L ON L 24 bit left justified Table 1 11 SW006 DIT4096 Channel Status Information Control 1 SW006 DESCRIPTION CSS Channel status data mode input default on COPY C Copy protect or channel status data input default on U User data input default on V Validity data inpu...

Page 10: ...03 104 DESCRIPTION OFF 40 kHz BW ON 20 kHz BW default Table 1 17 JP105 JP106 ADC Input Level Selection JP105 106 DESCRIPTION 1 Vrms 1 06 Vrms full scale voltage on ADC inputs default 2 Vrms 2 12 Vrms full scale voltage on ADC inputs Table 1 18 JP107 Bridge for PCM Audio Interface JP107 DESCRIPTION ON All straps must be mounted for interfacing onboard SPDIF receiver transmitter All straps must be r...

Page 11: ...lect High for ENABLE L High Pulse for SCL C SDA D and Low Pulse for Reset R for standard control Send Command Click box which should be set to 1 so that address and data is set to desired value Click pulldown menu Execute E and select Send S so that command that is already set up is sent through the printer port SLEU079 September 2006 Description 11 Submit Documentation Feedback ...

Page 12: ...0 0 130 120 110 100 90 80 70 60 50 40 30 20 10 d B r A 2k 20k 4k 6k 8k 10k 12k 14k 16k 18k Hz Typical Performance and Measurement Example The following graphs show typical performance and FFT results for the ADC and DAC 12 Description SLEU079 September 2006 Submit Documentation Feedback ...

Page 13: ...AC 48 kHz 60 dB 140 0 130 120 110 100 90 80 70 60 50 40 30 20 10 d B r A 2k 20k 4k 6k 8k 10k 12k 14k 16k 18k Hz Typical Performance and Measurement Example SLEU079 September 2006 Description 13 Submit Documentation Feedback ...

Page 14: ...48 kHz Line 0 5 dB 140 0 130 120 110 100 90 80 70 60 50 40 30 20 10 d B F S 2k 20k 4k 6k 8k 10k 12k 14k 16k 18k Hz Typical Performance and Measurement Example Description 14 SLEU079 September 2006 Submit Documentation Feedback ...

Page 15: ...48 kHz Line 60 dB 140 0 130 120 110 100 90 80 70 60 50 40 30 20 10 d B F S 2k 20k 4k 6k 8k 10k 12k 14k 16k 18k Hz Typical Performance and Measurement Example SLEU079 September 2006 Description 15 Submit Documentation Feedback ...

Page 16: ...Hz Mic No input signal 140 0 130 120 110 100 90 80 70 60 50 40 30 20 10 d B F S 2k 20k 4k 6k 8k 10k 12k 14k 16k 18k Hz Typical Performance and Measurement Example Description 16 SLEU079 September 2006 Submit Documentation Feedback ...

Page 17: ...ith 20 dB gain No input signal 140 0 130 120 110 100 90 80 70 60 50 40 30 20 10 d B F S 2k 20k 4k 6k 8k 10k 12k 14k 16k 18k Hz Typical Performance and Measurement Example SLEU079 September 2006 Description 17 Submit Documentation Feedback ...

Page 18: ...www ti com Typical Performance and Measurement Example Description 18 SLEU079 September 2006 Submit Documentation Feedback ...

Page 19: ...he DEM DAI3052A schematics Bill of Materials BOM and printed circuit boards Topic Page 2 1 DEM DAI3052A Schematics 20 2 2 DEM DAI3052A Bill of Materials BOM 24 2 3 DEM DAI3052A Printed Circuit Boards 27 SLEU079 September 2006 Schematics and Printed Circuit Boards 19 Submit Documentation Feedback ...

Page 20: ...4 100uF 16V C053 100uF 16V C051 0 1uF C052 100uF 16V AVCC AVCC 2 1 3 GND IN OUT C055 0 1uF U051 REG1117 3 3 CN057 FFC 2BMEP1 VDD CN051 banana jack Orange CN055 banana jack Black CN053 banana jack Blue CN054 banana jack Red CN052 banana jack Green CN056 B2P VH U053 TORX179P C060 10uF 16V R053 75 C059 0 1uF CN058 RCA pj R051 90 9 C057 0 1uF C058 10uF 16V U052 TOTX179P TR001 DA 02 CN059 RCA pj R052 3...

Page 21: ...CLK SYNC SDATA M S 28 27 26 25 24 23 22 21 20 19 18 17 16 15 MODE U V BLS BLSM EMPH AUDIO MONO MDAT VDD TX TX DGND RST DIT4096 BCK TX DATA SCLK LRCK RX DATA BCK TX DATA LRCK BCK SCLK LRCK RX DATA SCLK 1 2 3 4 5 6 7 8 C015 10uF 16V C014 0 1uF 1 2 3 4 5 6 7 8 9 10 Vcc GND 20 19 18 17 16 15 14 13 12 11 U005 74HCT244 FMT1 FMT0 CLK1 CLK0 C017 10uF 16V C016 0 1uF C018 0 1uF DIT out OPT in COAX in VCC MD...

Page 22: ... 6 3 2 C109 120pF R101 10k CN105 RCA pj U101 OPA2134PA 1 2 R103 1k C107 120pF C105 1200pF 2 3 1 4 R107 100 C103 1200pF JP101 2 2 JP101 1 2 JP103 C101 10uF 16V REFO VOUTL VOUTR VCC AGND 7 23 31 8 22 30 25 24 32 29 28 R105 15k MINP CN103 MINM LGY6502 R126 R125 R124 CN104 FFC 2BMEP1 JP109 FFC 4BMEP1 U104 REG103GA A VCC 5V C127 0 1uF C128 10uF 16V R128 20k R127 49 9k C129 0 01uF 4 3 1 2 5 JP110 FFC 4B...

Page 23: ...LRCK V IN R V IN L I 2 CEN MINP MINM SCL REFO V CC AGND SDA V OUT R V OUT L SCKI V DD DGND BCK DIN DOUT DOUTS C152 10uF 16V C164 0 1uF C162 0 1uF C168 0 1uF C167 0 1uF C151 10uF 16V C156 C155 C161 0 1uF 10uF 16V x2 10uF 16V C170 0 1uF C163 0 1uF C169 0 1uF PDWN C158 10uF 16V C165 10uF 16V PDWN AGND1 V CC 1 V IN R V REF 2 V REF 1 L M V IN L ATEST L M DEM DAI3052A Schematics Figure 2 4 DEM DAI3052A ...

Page 24: ...6 C107 C108 C109 Polypropylene Film Capacitor APSF0100J121 120 pF Nissei Electronic 4 C110 C115 C116 Polypropylene Film Capacitor APSF0100J182 1800 pF Nissei Electronic 2 C117 C118 Polypropylene Film Capacitor APSF0100J331 330 pF Nissei Electronic 2 C119 C120 Polypropylene Film Capacitor APSF0100J101 100 pF Nissei Electronic 2 C002 C004 C018 C051 C055 C057 Ceramic Capacitor RPEF11H104Z2K1A01B 0 1 ...

Page 25: ...r Array M6 1 473J 47 kΩ 5 Beckman 2 RA002 Resistor Array M4 1 473J 47 kΩ 3 Beckman 1 RA003 Resistor Array M10 1 473J 47 kΩ 9 Beckman 1 TR001 Pulse Transformer DA 02 JPC 1 CN001 10 Pin Pin Header FFC 10AMEP1 Honda Tsushin 1 CN002 9 Pin Pin Header FFC 9AMEP1 Honda Tsushin 1 CN051 Banana Jack Orange T 45 Orange Sato Parts 1 CN052 Banana Jack Green T 45 Green Sato Parts 1 CN053 Banana Jack Blue T 45 B...

Page 26: ...a Tsushin 28 SW001 SW051 Toggle Switch DPDT FT1D 2M Z Fujisoku 3 SW052 SW002 SW054 Push Switch FP1F 2M Z Fujisoku 2 SW003 SW053 DIP Switch DSS104 4 elements Fujisoku 2 Toggle Switch DPDT With SW004 FT1E 2M Z Fujisoku 1 Neutral SW005 DIP Switch DSS108 8 elements Fujisoku 1 SW006 DIP Switch DSS110 10 elements Fujisoku 1 Schematics and Printed Circuit Boards 26 SLEU079 September 2006 Submit Documenta...

Page 27: ...m 2 3 DEM DAI3052A Printed Circuit Boards DEM DAI3052A Printed Circuit Boards Figure 2 5 DEM DAI3052A Top Silkscreen SLEU079 September 2006 Schematics and Printed Circuit Boards 27 Submit Documentation Feedback ...

Page 28: ...www ti com DEM DAI3052A Printed Circuit Boards Figure 2 6 DEM DAI3052A Top Copper 28 Schematics and Printed Circuit Boards SLEU079 September 2006 Submit Documentation Feedback ...

Page 29: ...www ti com DEM DAI3052A Printed Circuit Boards Figure 2 7 DEM DAI3052A Bottom Copper SLEU079 September 2006 Schematics and Printed Circuit Boards 29 Submit Documentation Feedback ...

Page 30: ...www ti com DEM DAI3052A Printed Circuit Boards Figure 2 8 DEM DAI3052A Form Dimension and Drill Schematics and Printed Circuit Boards 30 SLEU079 September 2006 Submit Documentation Feedback ...

Page 31: ...rom any claim suit or proceeding arising from user s handling or use of the EVM including but not limited to I claims that the EVM infringes a third party s intellectu al property and ii claims arising from the user s use or handling of the EVM TI shall have no responsibility to defend any such claim suit or proceeding User assumes all responsibility and liability for proper and safe handling and ...

Page 32: ...y as to the load specification please contact a TI field representative During normal operation some circuit components may have case temperatures greater than 50 C The EVM is designed to operate properly with certain components above 50 C as long as the input and output ranges are maintained These components include but are not limited to linear regulators switching transistors pass transistors a...

Page 33: ...a warranty or endorsement thereof Use of such information may require a license from a third party under the patents or other intellectual property of the third party or a license from TI under the patents or other intellectual property of TI Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alter ation and is accompanied by all associated w...

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