Texas Instruments DAC8728EVM User Manual Download Page 18

1

2

3

4

5

6

A

B

C

D

6

5

4

3

2

1

D

C

B

A

1

2

3

4

5

6

7

8

9

10

11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32

J6

Parallel Data

D0

D1

D2

D3

D4

D5

D6

D7

D8

D9

D10

D11

1

2

3

4

5

6

7

8

9

10

11 12
13 14
15 16
17 18
19 20

J5

Analog_1

1

2

3

4

5

6

7

8

9

10

11 12
13 14
15 16
17 18
19 20

J1

Parallel Control

-VCC

AVDD

1

2

3

4

5

6

7

8

9

10

J4

Power Header

1

2

3

4

5

6

7

8

9

10

11 12
13 14
15 16
17 18
19 20

J3

Analog_0

AVDD

AVDD

AVDD

AVSS

JP14

AVSS Selection

C8

0.1uF

C7

0.1uF

C13

0.1uF

C12

0.1uF

11x17

1

1

OutA

1

-InA

2

+InA

3

V-

4

+InB

5

-InB

6

OutB

7

V+

8

U4

OPA2277

1

2

J2

EXT_REFA

EXT_REFB

+5VA

-5VA

+1.8VD

VD1

+3.3V

+5V

TP18
IOVDD

D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11

/CE

/WE

LATCH_CTRL

AVSS

R/W

TP13

AGND

TP5
AGND

TP6
AVDD

TP15
AVSS

L1

MMZ2012R601A

L3

MMZ2012R601A

C22

10uF

C24
10uF

C27

10uF

C26

10uF

+VA

+VA

-VA

-VA

L4

MMZ2012R601A

TP16
DVDD

L2

MMZ2012R601A

D12
D13
D14
D15

D12

D13

D14

D15

AVDD

AVSS

-VCC

AVSS

IOVDD

VOUT_0
VOUT_1

VOUT_2

VOUT_3
VOUT_4

VOUT_5

VOUT_6
VOUT_7

JP1

OP-AMP1

JP2

OP-AMP2

VOUT_0

VOUT_1

VOUT_2

VOUT_3

VOUT_4

VOUT_5

VOUT_6

VOUT_7

+1.8V

TP8
REF_A

L5

MMZ2012R601A

+3.3VD

+5VD

JP5

REFB Select1

JP7

REFB Select2

REF2.5V

REF5V

EXT_REFB

REF_B

JP15

DVDD Select1

+3.3V

+5V

DVDD

JP19

IOVDD Select1

JP20

IOVDD Select2

+3.3V

+1.8V

+5V

IOVDD

JP4

REFA Select1

JP6

REFA Select2

REF2.5V

REF5V

EXT_REFA

REF_A

DNC

1

Vin

2

TEMP

3

GND

4

TRIM

5

Vout

6

NC

7

DNC

8

U2

REF5025

5V

DNC

1

Vin

2

TEMP

3

GND

4

TRIM

5

Vout

6

NC

7

DNC

8

U1

REF02

REF5V

REF2.5V

REF_A

REF_B

DVDD

IOVDD

/CS

R/W

USB/BTC

RSTSEL

R12
10k

R11
10k

IOVDD

TP9
VMON

TP10

OFFSET_A

TP17

OFFSET_B

DC_/CS

TP11
/BUSY

TP12

GPIO

TP1

REF2.5V

TP2

REF5V

VCC

7

VCC

18

VCC

42

VCC

31

GND

4

GND

10

GND

15

GND

21

GND

45

GND

39

GND

34

GND

28

1DIR

1

2DIR

24

1OE

48

2OE

25

1B1

2

1B2

3

1B3

5

1B4

6

1B5

8

1B6

9

1B7

11

1B8

12

2B1

13

2B2

14

2B3

16

2B4

17

2B5

19

2B6

20

2B7

22

2B8

23

1A1

47

1A2

46

1A3

44

1A4

43

1A5

41

1A6

40

1A7

38

1A8

37

2A1

36

2A2

35

2A3

33

2A4

32

2A5

30

2A6

29

2A7

27

2A8

26

U10

SN74LVC16245A

IOVDD

R8
15k

IOVDD

EVM_A0

EVM_A2

EVM_A1

EVM_A3

/RST

/CLR

JP10

CS_Jumper

IOVDD

DC_/CS

1A

2

1B

3

2A

14

1G

1

2G

15

2B

13

1Y0

4

1Y1

5

1Y2

6

1Y3

7

2Y0

12

2Y1

11

2Y2

10

2Y3

9

VC

C

GND

U7

SN74LVC139A

LATCH

R6
10k

IOVDD

JP3

/CLR Jumper

R9
10k

IOVDD

JP9

/RST Jumper

/LDAC_CTRL

R14

10k

IOVDD

JP17

/LDAC Jumper

/CLR

/CE

/CE

/RST

TP3
OPA_Out1

TP4
OPA_Out2

R5

0

R4

0

C10
DNI

C11
DNI

C42

0.1uF

C43

0.1uF

C19

1uF

C18

1uF

TP7
REF_B

OE

1

1Q

2

1D

3

2D

4

2Q

5

3Q

6

3D

7

4D

8

4Q

9

GND

10

VCC

20

8Q

19

8D

18

7D

17

7Q

16

6Q

15

6D

14

5D

13

5Q

12

CLK

11

U11

SN74LV374A

C20

0.1uF

USB/BTC
RSTSEL

C44
0.1uF

C14
1uF

VOUT_0

VOUT_1

VOUT_2

VOUT_3

VOUT_4

VOUT_5

VOUT_6

VOUT_7

/BUSY

/BUSY

D1

3

1

D1

4

2

D1

5

3

VMON

4

VOUT_3

5

RE

F

_

A

6

AVD

D

8

VOUT_2

7

A

G

ND_

A

9

AVSS

11

OFFSET_A

12

VOUT_1

10

NC

14

RST

19

A0

20

VOUT_0

13

A1

21

NC

22

NC

23

DV

DD

24

DGND

25

A2

26

A3

27

NC

28

A4

29

PDN

30

NC

31

NC

32

GPIO

33

RSTSEL

34

NC

35

OFFSET_B

37

AVSS

38

A

G

ND_

B

40

AVD

D

41

VOUT_7

36

RE

F

_

B

43

NC

45

D0

46

VOUT_6

39

D1

47

D2

48

D3

49

VOUT_5

42

D4

50

D5

51

VOUT_4

44

D6

52

NC

53

DGND

54

IOV

D

D

55

DV

DD

56

USB/BTC

15

BUSY

16

CLR

17

LDAC

18

D9

61

D1

0

62

D1

1

63

D1

2

64

D7

59

D8

60

CS

58

R/W

57

U9

DAC8728PAG

R13

0

/RE

/CS

R/W

A

1

B

2

GND

3

Y

4

Vcc

5

U6

SN74LVC1G32

A

1

B

2

GND

3

Y

4

Vcc

5

U8

SN74LVC1G08

IOVDD

IOVDD

DC_/CS

1

1

1

OR Gate

AND Gate

A

1

B

2

GND

3

Y

4

Vcc

5

U5

SN74LVC1G32

OR Gate

IOVDD

LATCH_CTRL

/WE

LATCH

/RE
/WE

C1
1uF

C31
1uF

C32
1uF

C33
1uF

C34
1uF

R1

10

C6

0.01uF

R3

100

R2

49.9

EXT_/LDAC

JP13

USB/BTC

JP11

RSTSEL

JP8

OFFSET_A

JP16

OFFSET_B

A

1

B

2

GND

3

Y

4

Vcc

5

U12

SN74LVC1G08

IOVDD

AND Gate

R15

10k

JP18

EXT_/LDAC

/LDAC_CTRL

EXT_/LDAC

IOVDD

/LDAC

TP14

AGND

C2
1uF

C3
22uF

C4
47uF

C5
0.01uF

C9
47uF

C16
47uF

5V

C29
1uF

C28

1uF

C30
1uF

C40
1uF

C41
1uF

2

3

V+

V-

6

U3

OPA277

C15
1uF

R7
1.5

C23
10uF

C25
10uF

C36
10uF

C39
10uF

C37
10uF

C38
10uF

C17
10uF

Summary of Contents for DAC8728EVM

Page 1: ...e circuit descriptions schematic diagrams and bills of material are included in this document The following related documents are available through the Texas Instruments web site at www ti com Related...

Page 2: ...pply Configuration 15 List of Tables 1 J5 Analog Output Connector Pinout 3 2 J2 Parallel Interface Pins 5 3 External Logic Behavior 6 4 SN74LVC374 Control 7 5 LDAC Control 7 6 A0 and A1 Address Combin...

Page 3: ...ety of processors Consequently access to the parallel interface is achieved through external logic controlled by the host processor parallel interface Throughout this document the acronym EVM and the...

Page 4: ...r line decoder demultiplexer U7 on EVM This device is used to create eight control bits from the processor address that are used around the board to control various signals such as the LATCH input to...

Page 5: ...mpletes DSP Write Strobe Signal is cycled low to J2 3 WE high within the CE strobe when a parallel bus write occurs DSP Read Strobe Signal is cycled low to J2 5 RE high within the CE strobe when a par...

Page 6: ...nections to the SN74LVC139 Figure 1 Parallel Control Header and SN74LVC139 4 1 Required External Logic Most of TI s host processors do not have a hardware chip select that meets the timing requirement...

Page 7: ...374 Control LATCH_CTRL WE LATCH 0 0 0 0 1 1 1 0 1 1 1 1 The final piece of external logic gives the EVM user the ability to control the LDAC signal from both the processor I O pins and the SN74LVC139...

Page 8: ...on the 1Y0 output of the SN74LVC139 U7 The LATCH_CTRL signal is logic ORed with the WE signal to create the LATCH signal that is used to control the CLK input to the SN74LVC374 on the EVM During the...

Page 9: ..._CS0 0 0 1 1 1 0 0 1 1 1 0 1 1 0 1 0 1 1 1 1 0 1 1 1 Table 8 Commonly Used Address Combinations A3 to A0 Hex Open1 LATCH_CTRL 0x0 DC_CS R W 0x5 LDAC LATCH_CTRL 0xC DC_CS Open2 0x7 4 10 BUSY Signal The...

Page 10: ...d TSM 116 01 T DV to provide a convenient 16 pin dual row header socket combination at J6 This header socket combination provides access to the parallel data pins of the DAC8728 and the inputs to the...

Page 11: ...ed from VA a 8 to 36V analog supply range When the DAC8728 is run in bipolar mode AVSS and AVDD are required AVSS can range from 4 5V to 18V and AVDD can range from 4 5V to 18V The DAC8728 AVDD VA sup...

Page 12: ...pers JP1 and JP2 allow the user to route the DAC outputs to the input of a voltage follower amplifier that drives an RC low pass filter The capacitor is not installed and a 0 resistor connects the op...

Page 13: ...ht binary Sets the DAC8728 to unipolar operation by routing JP14 2 3 the AVSS pin to AGND Sets the DVDD input to the DAC8728 to 3 3V from JP15 1 2 pin 10 on the J4 header Routes the OFFSET_B pin direc...

Page 14: ...ET_B pins must be shorted directly to GND for unipolar single supply operation Table 11 Unipolar Single Supply Configuration Jumper Position JP3 JP4 JP5 JP6 JP7 JP9 1 2 JP15 JP17 JP19 JP20 JP14 2 3 JP...

Page 15: ...dual supply operation Table 12 Bipolar Dual Supply Configuration Jumper Position JP3 JP4 JP5 JP6 JP7 JP9 1 2 JP14 JP15 JP17 JP19 JP20 JP1 JP2 JP8 JP13 JP16 JP18 Open JP11 Closed JP10 3 4 Figure 6 Bip...

Page 16: ...r Ceramic 10mF 50V X7S 1210 Taiyo Yuden UMK325C7106MM T C27 11 3 J1 J3 J5 Top 20 pin header Samtec TSM 110 01 T DV 12 3 J1 J3 J5 Bottom 20 pin socket Samtec SSW 110 22 S D VS 13 1 J2 TERMINAL BLOCK 3...

Page 17: ...Op Amp 8 SOP TI OPA227UA 35 1 U4 Dual Precision Op Amp 8 SOP TI OPA2277U 36 2 U5 U6 Little Logic OR Gate SOT23 5 TI SN74LVC1G32DBV 37 1 U7 Dual 2 4 Line Decoder 16 SOP TI SN74LVC139AD 38 2 U8 U12 Litt...

Page 18: ...4 2B3 16 2B4 17 2B5 19 2B6 20 2B7 22 2B8 23 1A1 47 1A2 46 1A3 44 1A4 43 1A5 41 1A6 40 1A7 38 1A8 37 2A1 36 2A2 35 2A3 33 2A4 32 2A5 30 2A6 29 2A7 27 2A8 26 U10 SN74LVC16245A IOVDD R8 15k IOVDD EVM_A0...

Page 19: ...oduct This notice contains important safety information about temperatures and voltages For additional information on TI s environmental and or safety programs please contact the TI application engine...

Page 20: ...h statements TI products are not authorized for use in safety critical applications such as life support where a failure of the TI product would reasonably be expected to cause severe personal injury...

Page 21: ...ltera Analog Devices Intersil Interpoint Microsemi Aeroflex Peregrine Syfer Eurofarad Texas Instrument Miteq Cobham E2V MA COM Hittite Mini Circuits General Dynamics 8 812 309 58 32 8 812 320 02 42 or...

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