Texas Instruments DAC7562EVM User Manual Download Page 10 | Manualshive

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Schematics and Layout

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Figure 3. DAC8562EVM: Top Layer Image

Figure 4. DAC8562EVM: Bottom Layer Image

10

DAC7562EVM, DAC8562EVM

SBAU183A

–

May 2011

–

Revised June 2011

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Copyright

©

2011, Texas Instruments Incorporated

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Summary of Contents for DAC7562EVM

Page 1: ...efault giving a full scale output range of 5V when placed in a gain of two configuration The EVM allows evaluation of all aspects of the device and allows user control over every pin on the DAC7562 DA...

Page 2: ...JP3 6 2 DAC8562EVM Default Jumper Locations 8 3 DAC8562EVM Top Layer Image 10 4 DAC8562EVM Bottom Layer Image 10 List of Tables 1 J1 Analog Interface Pinout 3 2 J2 3 Serial Interface Pins 4 3 J3 Confi...

Page 3: ...the DAC logic using onboard jumpers or digitally through the J2 header By default the evaluation module is configured to be used with an onboard 2 5V external reference but can be easily modified to...

Page 4: ...t J2 This header socket provides access to the digital control data pins from both J2A top side and J2B bottom side of the connector Consult Samtec at http www samtec com or call 1 800 SAMTEC 9 for a...

Page 5: ...al J3 3 5VA 5V analog supply Yes J3 4 5VA 5V analog supply No J3 5 DGND Digital ground input Yes J3 6 AGND Analog ground input Yes J3 7 1 8VD 1 8V digital supply No J3 8 3 3VD 3 3V digital supply No J...

Page 6: ...is disabled and requires an external reference voltage Jumper JP3 controls which external reference source is used When JP3 is in the 2 3 position default the REF5025 is used When JP3 is in the 1 2 po...

Page 7: ...be connected directly to a DSP or microcontroller interface board such as the MMB0 DSP board available from Texas Instruments No specific evaluation software is provided with this EVM However various...

Page 8: ...s enabled the user must ensure that jumper JP3 is either floating or connected in the 1 2 position The internal reference voltage is then buffered through the OPA379 and routed to J1 20 It is importan...

Page 9: ...in dual row SM header 20 Pos Samtec SSW 110 22 F D VS K 9 1 J3A Top Side 5 pin dual row SM header 10 Pos Samtec TSM 105 01 T DV P 10 1 J3B Bottom Side 5 pin dual row SM header 10 Pos Samtec SSW 105 22...

Page 10: ...www ti com Figure 3 DAC8562EVM Top Layer Image Figure 4 DAC8562EVM Bottom Layer Image 10 DAC7562EVM DAC8562EVM SBAU183A May 2011 Revised June 2011 Submit Documentation Feedback Copyright 2011 Texas In...

Page 11: ...on Page Updated document title to reflect DAC7562EVM device 1 NOTE Page numbers for previous revisions may differ from page numbers in the current version 11 SBAU183A May 2011 Revised June 2011 Revisi...

Page 12: ...2 8 DGND 10 GPIO3 12 GPIO4 14 SCL 16 DGND 18 SDA 20 CNTL 1 CLKX 3 CLKR 5 FSX 7 FSR 9 DX 11 DR 13 INT 15 TOUT 17 GPIO5 19 J2A DAUGHTER SERIAL R1 10K R2 10K C5 0 1uF C2 10uF JP4 R6 0 R8 33 JP2 JP1 VIN 2...

Page 13: ...roduct This notice contains important safety information about temperatures and voltages For additional information on TI s environmental and or safety programs please contact the TI application engin...

Page 14: ...orized for use in safety critical applications such as life support where a failure of the TI product would reasonably be expected to cause severe personal injury or death unless officers of the parti...

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