Start
LSB
2
3
Parity Stop
4
5
6
7
MSB
Start
LSB
2
3
Addr/
data
Parity
4
5
6
7
MSB
Stop
Idle-line mode
(Normal nonmultiprocessor communications)
Address-bit mode
Address bit
Enhanced SCI Module Overview
984
SPRUH22I – April 2012 – Revised November 2019
Copyright © 2012–2019, Texas Instruments Incorporated
C28 Serial Communications Interface (SCI)
Figure 13-3. Typical SCI Data Frame Formats
To program the data format, use the SCICCR register. The bits used to program the data format are
shown in
Table 13-4. Programming the Data Format Using SCICCR
Bit(s)
Bit Name
Designation
Functions
2-0
SCI CHAR2-0
SCICCR.2:0
Select the character (data) length (one to eight bits).
5
PARITY
SCICCR.5
Enables the parity function if set to 1, or disables the parity function
ENABLE
if cleared to 0.
6
EVEN/ODD
SCICCR.6
If parity is enabled, selects odd parity if cleared to 0 or even parity if
PARITY
set to 1.
7
STOP BITS
SCICCR.7
Determines the number of stop bits transmitted—one stop bit if cleared to 0 or two
stop bits if set to 1.
13.1.1.4 SCI Multiprocessor Communication
The multiprocessor communication format allows one processor to efficiently send blocks of data to other
processors on the same serial link. On one serial line, there should be only one transfer at a time. In other
words, there can be only one talker on a serial line at a time.
Address Byte
The first byte of a block of information that the talker sends contains an address byte that is read by all
listeners. Only listeners with the correct address can be interrupted by the data bytes that follow the
address byte. The listeners with an incorrect address remain uninterrupted until the next address byte.
Sleep Bit
All processors on the serial link set the SCI SLEEP bit (bit 2 of SCICTL1) to 1 so that they are interrupted
only when the address byte is detected. When a processor reads a block address that corresponds to the
CPU device address as set by your application software, your program must clear the SLEEP bit to enable
the SCI to generate an interrupt on receipt of each data byte.
Although the receiver still operates when the SLEEP bit is 1, it does not set RXRDY, RXINT, or any of the
receiver error status bits to 1 unless the address byte is detected and the address bit in the received
frame is a 1 (applicable to address-bit mode). The SCI does not alter the SLEEP bit; your software must
alter the SLEEP bit.
13.1.1.4.1 Recognizing the Address Byte
A processor recognizes an address byte differently, depending on the multiprocessor mode used. For
example:
•
The idle-line mode (
) leaves a quiet space before the address byte. This mode does
not have an extra address/data bit and is more efficient than the address-bit mode for handling blocks
that contain more than ten bytes of data. The idle-line mode should be used for typical non-
multiprocessor SCI communication.
•
The address-bit mode (
) adds an extra bit (that is, an address bit) into every byte to
distinguish addresses from data. This mode is more efficient in handling many small blocks of data