The routing destination of these signal pairs are selected using the on-board switch S2, as described below in
Table 3-4. SCI UART Select Table - S2
SEL1 (Left)
SEL2 (Right)
GPIO28/29
GPIO15/56
0
0
XDS110 COM Port
BP Headers
0
1
XDS110 COM Port
No Connect
1
0
BP Headers
BP Headers
1
1
BP Headers
XDS110 COM Port
3.3.3 EQEP Routing
The LaunchPad has the ability to connect to two independent linear or rotary encoders through the F28003x
on-chip eQEP interfaces: Header J12 is connected to eQEP1 and header J13 is connected to eQEP2. By
default, this connection is not active and the GPIOs are routed to the BoosterPack connectors. The 5 V eQEP
input signals from the J12 and J13 connectors are stepped down through a TI SN74LVC8T245 Level Translator
(U13) to 3.3 V. The signals are then routed through TI SN74LV4053A Triple 2-Channel Analog Multiplexer/
Demultiplexer ICs (U11/U14). Switch S5 controls the select inputs of the ICs to configure the eQEP signal
destinations to be either the J12/J13 connectors or BoosterPack headers, as described below in
.
Table 3-5. QEP Select Table - S5
QEP1 SEL (LEFT)
QEP2 SEL (RIGHT)
QEP1 Signals
(GPIO40/41/59)
QEP2 Signals
(GPIO14/55/57)
0 (down)
0 (down)
J12
J13
0 (down)
1 (up)
J12
BP Headers
1 (up)
0 (down)
BP Headers
J13
1 (up)
1 (up)
BP Headers
BP Headers
3.3.4 CAN Routing
The LaunchPad can be connected to a CAN bus through J14. GPIO4 and GPIO5 are routed to the on-board TI
TCAN332DR 3.3V CAN Transceiver, U15. By setting S4 to DOWN (on), GPIO4 and GPIO5 are routed to the
transceiver. If S4 is set to UP (off), the GPIOs are routed to the BoosterPack connectors (default case).
3.3.5 FSI Routing
One set of GPIOs with available FSI functionality are directly connected to the FSI header, J11. The traces
from the device to the FSI header are made short to ensure higher signal integrity, as FSI signals can switch at
frequencies up to 120MHz on f28003x devices.
3.3.6 X1/X2 Routing
The F280039C crystal oscillator output signal, X2, is multiplexed with GPIO18 and the crystal oscillator input,
X1, is multiplexed with GPIO19. By default, the Launchpad uses an on-board crystal oscillator, Y2, as the clock
source for the on-chip Phase-Locked Loop (PLL) that requires both X1 and X2 signals of the MCU. To balance
the requirement of having cleanly routed oscillator signals and bringing all possible GPIOs to the BoosterPack
connectors, both GPIO18/X2 and GPIO19/X1 can be routed to the BoosterPack connectors through 0 Ω
resistors. If GPIO18 or GPIO19 are needed at the BoosterPack connectors, the on-chip zero-pin oscillators
must be used as the clock source for the on-chip PLL. For more information on the X1/X2 configurations, see the
TMS320F28003x Real-Time Microcontrollers Data Sheet
If GPIO18 functionality is needed at the BoosterPack Connector:
1. Remove R32 to separate GPIO18 from Y2.
2. Populate R36 to connect GPIO18 to the BoosterPack connector
If GPIO19 functionality is needed at the BoosterPack Connector:
1. Remove R33 to separate GPIO19 from Y2.
2. Populate R37 to connect GPIO19 to the BoosterPack connector.
Hardware Description
SPRUJ31 – APRIL 2022
C2000
™
F28003x Series LaunchPad
™
Development Kit
15
Copyright © 2022 Texas Instruments Incorporated