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PWM Dimming Control
Output channel
Data byte
CH0, CH1
BYTE1
CH2, CH3
BYTE2
CH4
BYTE3
CH5
BYTE4
Because the data width of a data byte is fixed to 8 bits, the step size of the LED current is equal to 1/256
of the full scale current. To allow the use of 0% on duty, the steps 1 and 2 are combined to give a 2/256
on duty. Thus either applying a hexadecimal code 001h or 002h the LM3463 will give a 2/256 on duty. The
dimming duty in the serial interface mode is governed by the following equation:
(5)
Figure 8 shows the relationship of the code value of a data byte and PWM dimming duty.
DC Interface Mode
In the DC interface mode, the on duty of the output channels are adjusted according to the voltage on the
terminals TP12, TP14, TP16 and TP20. In this mode, the six output channels are grouped into four groups
and controlled by the voltage on four terminals individually as listed in the following table:
Output channel
Terminal
CH0, CH1
TP12
CH2, CH3
TP14
CH4
TP16
CH5
TP18
The voltage being applied to the terminals should be in the range of 0.8V to 5.7V. The dimming duty in the
DC interface mode is governed by the following equation:
(6)
In this mode, the conversion of analog voltage to dimming duty is accomplished by an internal 8-bit ADC
of the LM3463, thus the step size of the LED current is equal to 1/256 of the full scale current. To allow
the use of 0% on duty, the steps 1 and 2 are combined to give a 2/256 on duty. Thus either applying a
voltage in the range of 0.8V to 0.8V+V
LSB
to the dimming control inputs will result in a 2/256 on duty.
Figure 9 shows the Conversion characteristics of the analog voltage to PWM dimming control circuit:
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AN-2255 LM3463 Evaluation Board
SNVA642 – May 2012
Copyright © 2012, Texas Instruments Incorporated