Texas Instruments AN-2255, User Manual, Page: 13 / 26

0
V
DHC_READY
V
RAIL(nom)
V
LED
V
RAIL
Time
t
ST-1
t
ST-2
t
ST-3
t
ST-1
open
R
ISR
Startup time
t
ST-2
high
t
ST-3
low
V
IN-UVLO
6.67V
www.ti.com
MOSFET Power Dissipation Limit
(2)
where
(3)
Figure 8. Adjusting the tST with different value of RISR
The R9 on this evaluation board is opened by default, thus the system startup time is set to the longest.
The startup time of the board can be reduced by putting a 0603 resistor to the position of R9. The value of
the R9 should be no less than 130k
Ω .
10 MOSFET Power Dissipation Limit
As the drain voltage of the MOSFETs (Q1, Q2, Q3, Q4, Q5 and Q6) exceeds four times the voltage of the
DRVLIM pin, the output currents are reduced to reduce the power dissipations on the MOSFETs. The
DRVLIM of the LM3463 of this evaluation board is connected to VCC via a 0
Ω resistor, R37. Thus the
drain voltage threshold to perform MOSFET power dissipation limit is about 26.4V by default.
11 Analog Dimming Control
The reference voltage for the LED current regulators can be adjusted by changing the voltage at the
IOUTADJ pin of the LM3463. In this evaluation board, the reference voltage for current regulation is set to
200mV by connecting the IOUTADJ pin to VCC via a 0
Ω resistor, R10. By default the pull-down resistor to
the IOUTADJ pin, R11 is opened. To adjust the IOUTADJ pin voltage, the R10 and R11 should be
replaced according to the required output current following the equation below:
(4)
The IOUTADJ pin can be biased by a positive voltage in the range of 0V to 2.5V across the terminals
TP31and TP39. If the IOUTADJ pin is going to be biased by an external voltage source, the R10 and R11
should be removed.
12 PWM Dimming Control
The LM3463 evaluation board allows three different modes of PWM dimming control:
• Direct PWM Dimming Mode
13 SNVA642 – May 2012 AN-2255 LM3463 Evaluation Board
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated