background image

UVLO

1

CSP

2

VIN

3

4

8

COFF

7

EN

6

CSN

5

9

10

GND

PGATE

DAP

VCC

IADJ

LM3409HV Pin Descriptions

www.ti.com

Pin

Name

Description

Application Information

Pre-regulator Gate Bias Output: Connect to gate of

16

BIAS

Pre-regulator Gate Bias

passFET and to resistor to rectified AC (drain of
passFET) to aid with startup.

7

LM3409HV Pin Descriptions

Pin

Name

Description

Application Information

Connect to a resistor divider from V

IN

. UVLO threshold is

1

UVLO

Input Under Voltage Lock-out

1.24V and hysteresis is provided by a 22µA current
source.

Apply a voltage between 0 - 1.24V, or connect a resistor

2

I

ADJ

Analog LED Current Adjust

from this pin to GND, to set the current sense threshold
voltage.

Apply a voltage >1.6V to enable device, a PWM signal

3

EN

Logic Level Enable

to dim, or a voltage <0.6V for low power shutdown.

Connect an external resistor from V

O

to this pin, and a

4

COFF

Off-time programming

capacitor from this pin to GND to set the off-time.

5

GND

Power Ground

Connect to the system ground.

6

PGATE

Gate Drive

Connect to the gate of the external PFET.

7

CSN

Negative Current Sense

Connect to the negative side of the sense resistor.

Connect to the positive side of the sense resistor (also

8

CSP

Positive Current Sense

connected to V

IN

).

Connect at least a 1 µF ceramic capacitor from this pin

9

V

CC

V

IN

-referenced Linear Regulator Output

to CSN. The regulator provides power for P-FET drive.

10

V

IN

Input Voltage

Connect to the input voltage.

Connect to pin 5 (GND). Place 4-6 vias from DAP to

DAP

DAP

Thermal PAD on bottom of IC

bottom layer GND plane.

6

AN-2150 LM3450A Evaluation Board

SNVA485B – June 2011 – Revised May 2013

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Copyright © 2011–2013, Texas Instruments Incorporated

Summary of Contents for AN-2150 LM3450A

Page 1: ...This two stage design provides excellent line and load regulation as well as isolation The board is comprised of two copper layers with components on both sides and an FR4 dielelctric The two stage de...

Page 2: ...RETURN EMI FILTER PWM AC INPUT LED LOAD VCC VAC ISEN VREF VADJ HOLD LM3409HV LED Driver Specifications www ti com Figure 1 Schematic 2 AN 2150 LM3450A Evaluation Board SNVA485B June 2011 Revised May 2...

Page 3: ...32 200 VAC 230 VAC www ti com Typical Performance 3 Typical Performance Figure 2 120V 30W Version Figure 3 230V 30W Version Efficiency vs Output Power Efficiency vs Output Power Figure 4 120V 30W Ver...

Page 4: ...6 120V 30W Conducted EMI Peak Scan Figure 7 230V 30W Conducted EMI Peak Scan Line and Neutral CISPR FCC Class B Quasi Peak and Line and Neutral CISPR FCC Class B Quasi Peak and Average Limits Average...

Page 5: ...sation Connect a capacitor to GND to set the compensation Error Amplifier Inverting Input Connect to output voltage via resistor divider to control PFC voltage loop for non 8 FB Feedback isolated desi...

Page 6: ...Level Enable to dim or a voltage 0 6V for low power shutdown Connect an external resistor from VO to this pin and a 4 COFF Off time programming capacitor from this pin to GND to set the off time 5 GN...

Page 7: ...7 D6 R5 R7 R17 R23 R24 R25 R26 R29 R32 R38 R30 R31 R34 R36 R70 R77 R72 R81 R16 R71 R84 R65 R66 R83 R58 R1 C35 C34 C38 C36 C39 C37 C47 D15 D13 D14 D22 D11 D12 Q7 L3 Q6 Q2 R57 HOLD VLED R39 D7 D2 D3 U9...

Page 8: ...n board shown in Figure 11 is a critical conduction mode CRM flyback converter controlled with the LM3450A CRM converters operate at the boundary of continuous conduction mode CCM and discontinuous co...

Page 9: ...phase dimmer decoder 9 2 2ND Stage Buck LED Driver The second stage of the evaluation board is a buck LED driver controlled with the LM3409HV The input to this stage is the flyback output voltage and...

Page 10: ...e of each triangular current pulse during a switching period The peak input current occurs at the peak primary current 5 Turns Ratio The first thing to decide with an isolated design is the desired tr...

Page 11: ...nt IIN PK Peak Input Current ILIM Peak Current Limit DMIN Minimum Duty Cycle over Line Cycle VR Output Voltage Reflected to Primary VR MAX Maximum Tolerable Reflected Voltage VT DES MAX Maximum Tolera...

Page 12: ...core value 160nH turns2 is a good standard value to start with can be chosen that will imply the gap size AL is an industry standard used to define how much inductance per turns squared that a given...

Page 13: ...on of the process Definitions Expected converter efficiency POUT MAX Maximum Output Power VIN MIN Minimum RMS AC Line Voltage VIN PK MIN Minimum Peak Input Voltage IIN PK MAX Maximum Peak Input Curren...

Page 14: ...coupled to the regulated flyback output the output winding is tapped to provide the secondary bias output It is also advantageous to linear regulate down to approximately 9V from the 12V bias supplies...

Page 15: ...me ripple specification 19 Output Capacitance Since the LM3450A is a power factor controller C1 is minimized and the output capacitor C11 serves as the main energy storage device C11 should be a high...

Page 16: ...portant and is evaluated by looking at the safe operating area SOA of the device Finally Q1 needs to be able to dissipate the maximum power Looking at an absolute worst case condition for the Q1 durin...

Page 17: ...cing the maximum attainable holding current Placement of R44 is critical to ensure the best possible thermal coupling to Q1 The drain of Q1 will have the highest temperature rise but it is at a much h...

Page 18: ...C18 can both be set to 1 F for all designs and given the filter frequencies the resistors R24 R25 are calculated 24 Figure 17 Dimming Decoder Mapping Opto Isolator A standard low cost opto isolator s...

Page 19: ...26 The feedback gain HFB is unity due to the control implementation and the LM3450A device and external gains are defined 27 A standard PI compensator is used on the secondary to stabilize the system...

Page 20: ...opto CTR though variable over temperature given a fixed supply rail and a fixed R70 value In several cases the product of two DC gain terms can also be identified as relatively constant over all desi...

Page 21: ...mizing bandwidth of the control loop 9 9 STARTUP When using the LM3450A with a phase dimmer startup can be very disruptive Any time the dimmer is turned on via a separate switch or some state where th...

Page 22: ...ce for damping an EMI filter is to use an RC damper network across each filter capacitor The C of the damper should be set to be 3 times the filter capacitor value This EMI filter if sized properly ca...

Page 23: ...n This combined with the filter stage between the passFET and the transformer help attenuate any unwanted switching frequency coupling into the dynamic hold circuit This configuration also provides so...

Page 24: ...rse degrade efficiency but some inrush protection is also necessary in any AC system due to startup The size of R39 and R57 are best found experimentally as they provide attenuation for the whole syst...

Page 25: ...Minimum peak input voltage 35 Maximum average input current 36 Maximum peak input current 37 Maximum peak primary current 38 10 3 Main Switching MOSFET Maximum drain to source voltage 39 Maximum peak...

Page 26: ...10 5 Current Sense Sense resistor 49 Power dissipation 50 Resulting component choice 51 10 6 Input Capacitance Minimum capacitance 52 Voltage rating 53 Resulting component choice 54 10 7 Output Capaci...

Page 27: ...1 Transformer primary inductance 62 Number of primary turns 63 Number of secondary turns 64 Number of auxiliary turns 65 Maximum flux density 66 Resulting component choice 67 10 9 Transil Clamp TVS cl...

Page 28: ...nent choice 74 10 12 Output Voltage Sense Resistance 75 Resulting component choice 76 10 13 Loop Compensation Converter output pole 77 Converter DC gain 78 LM3450A and external sensing DC gain 79 Seco...

Page 29: ...ti com Design Calculations 120V 30W Primary roll off pole 82 Resulting component choice 83 29 SNVA485B June 2011 Revised May 2013 AN 2150 LM3450A Evaluation Board Submit Documentation Feedback Copyri...

Page 30: ...ias O1bias R58 Q6 D11 Sbias O2bias U10 R70 R77 R81 R72 C34 C35 1 2 5 4 3 6 U9 D14 1 2 5 4 3 6 U8 R71 SDIM R69 DIM R16 O1Pbias R41 R43 R40 PBIAS R42 COMP FB C25 VDC O1bias O2bias Linear Regulators Inpu...

Page 31: ...D D11 D12 D18 DIODE ZENER 10V 500mW SOD 123 FAIRCHILD MMSZ5240B D13 DIODE ULTRAFAST 70V 0 2A SOT 23 FAIRCHILD BAV99 D14 DIODE ZENER 3 3V 500mW SOD 123 ON SEMI MMSZ3V3T1G D15 DIODE SCHOTTKY 60V 2A SMB...

Page 32: ...SHAY PAC300005008FAC000 R44 THERM 10k NTC 0603 MURATA NTCG163JF103F R45 RES 15 0k 1 0 1W 0603 VISHAY CRCW060315K0FKEA R46 RES 5 11k 1 0 125W 0805 VISHAY CRCW08055K11FKEA R48 R51 R62 RES 20 0k 1 0 25W...

Page 33: ...D ES1D D10 D23 DIODE ULTRAFAST 400V 1A SMA FAIRCHILD ES1G D11 D12 D18 DIODE ZENER 10V 500mW SOD 123 FAIRCHILD MMSZ5240B D13 DIODE ULTRAFAST 70V 0 2A SOT 23 FAIRCHILD BAV99 D14 DIODE ZENER 3 3V 500mW S...

Page 34: ...RES 5 62 1 0 25W 1206 VISHAY CRCW12065R62FKEA R38 RES 5 11k 1 0 1W 0603 VISHAY CRCW06035K11FKEA R39 R57 RES 10 1 3W WIREWOUND VISHAY PAC300001009FAC000 R44 THERM 10k NTC 0603 MURATA NTCG163JF103F R46...

Page 35: ...out Figure 26 Top Copper and Silkscreen Figure 27 Bottom Copper and Silkscreen 35 SNVA485B June 2011 Revised May 2013 AN 2150 LM3450A Evaluation Board Submit Documentation Feedback Copyright 2011 2013...

Page 36: ...sponsible for compliance with all legal regulatory and safety related requirements concerning its products and any use of TI components in its applications notwithstanding any applications related inf...

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