Texas Instruments ADS8860EVM-PDK, User Manual, Page: 4 / 20

AINP
AINN
10000pF
4.7
4.7
+
-
1k
OPA836
+1.125V
-2.15V
+2.15V
1k
0V
5V
A0(-)
JP4 (CLOSED)
Transfer Function:
AINP = 2.25V
±
A0(-)
0.1V
4.4V
2.25V
EVM Analog Interface
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3 EVM Analog Interface
The ADS8860EVM is designed for easy interfacing to multiple analog sources. SMA connectors allow
the EVM to have input signals connected through coaxial cables. In addition, the Samtec™ connector
provides a convenient 10-pin, dual-row, header and socket combination at J1. Consult Samtec at
www.samtec.com or call 1-800-SAMTEC-9 for a variety of mating connector options. The analog inputs
are buffered by an OPA836 high-speed operational amplifier in order to properly drive the ADS8860
ADC input.
Use appropriate caution when handling these pins. Table 2 summarizes the pinout for analog interface J1.
Table 2. Analog Inputs
Pin
Connector Number Signal Description
Samtec 10 x 2 J1.10 A0(-) CH0 inverted EVM input
SMA J4 A0(-) CH0 inverted EVM input
3.1 Unipolar Input Signal Configuration
With JP4 closed, the OPA836 positive input is biased with +1.125 V, created by diving the 4.5-V onboard
reference by four. This bias becomes a 2.25-V offset at the output of the OPA836 that allows input signals
with a 0-V common mode. To keep the OPA836 distortion as low as possible, the input signal swing is
limited from –2.15 V to +2.15 V, as shown in
Figure 1 .
Figure 1. Differential Input Example
4 ADS8860EVM-PDK SBAU213 – September 2013
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